Abstract:
A parameter setting and circuit protecting method applied in a power converter are disclosed. An input voltage of the power converter is detected to generate a first detecting signal related to the input voltage. The first detecting signal will be thence compared with a threshold so as to generate a protecting signal for protecting the power converter. When a parameter setting signal is triggered, a current is provided so as to make the first detecting signal to generate a variation, thereby setting a parameter in accordance with the variation.
Abstract:
A frequency jittering control circuit for a PFM power supply includes a pulse frequency modulator to generate a frequency jittering control signal to switch a power switch to generate an output voltage. The frequency jittering control circuit jitters an input signal or an on-time or off-time of the pulse frequency modulator to jitter the switching frequency of the power switch to thereby improve EMI issue.
Abstract:
A floating gate driver uses a single-end level shifter to translate a set signal and a reset signal induced by a rising edge and a falling edge of a switch signal to a common output terminal to generate an output voltage for a bistable circuit to generate a level shifted switch signal. Under control of a well transient detect signal asserted by detecting noise in the output voltage, a masking circuit between the single-end level shifter and the bistable circuit masks noise in the output voltage. This configuration has lower area penalty and better noise immunity.
Abstract:
A floating gate driver uses a single-end level shifter to translate a set signal and a reset signal induced by a rising edge and a falling edge of a switch signal to a common output terminal to generate an output voltage for a bistable circuit to generate a level shifted switch signal. Under control of a well transient detect signal asserted by detecting noise in the output voltage, a masking circuit between the single-end level shifter and the bistable circuit masks noise in the output voltage. This configuration has lower area penalty and better noise immunity.
Abstract:
A mixed mode compensation circuit and method for a power converter generate a digital signal according to a reference value and a feedback signal which is related to the output voltage of the power converter, convert the digital signal into a first analog signal, offset the first analog signal with a variable offset value to generate a second analog signal, and filter out high-frequency components of the second analog signal to generate a third analog signal for stable output voltage of the power converter. The mixed mode compensation does not require large capacitors, and thus the circuit can be integrated into an integrated circuit.
Abstract:
A control circuit for a power converting circuit includes a multifunctional pin, a pulse-width-modulation (PWM) signal generating circuit, a voltage detecting circuit and a zero current detecting circuit. The voltage detecting circuit detects a signal on the multifunctional pin. When the signal on the multifunctional pin is greater than a predetermined value, the voltage detecting circuit configures the PWM signal generating circuit to intermittently conduct a current switch of the power converting circuit. The zero current detecting circuit detects the signal of the multifunctional pin to determine the conduction status of the current switch. When the signal of the multifunctional pin is less than the predetermined value, the voltage detecting circuit configures the PWM signal generating circuit to turn off the current switch.
Abstract:
A control circuit of a flyback power converter includes a first reference signal generating circuit for generating a first reference signal; a reference signal adjusting circuit for generating an adjustment signal according to the first reference signal and a test signal corresponding to an output voltage signal of the flyback power converter, and to generate a second reference signal according to the adjustment signal and the first reference signal; an error detection circuit for generating an error signal according to the second reference signal and a feedback signal; and a control signal generating circuit for generating a control signal according to the error signal to control operations of a power switch to thereby adjust the test signal. The feedback signal corresponds to a current flowing through a primary side coil of the power converter or a sensing voltage of an inductive coil of the power converter.
Abstract:
A control circuit for a power converter includes a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is coupled with an output end of the power converter through a resistor. The driving circuit conducts a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit calculates a first difference between the first sampling value and a first reference value, and a second difference between the second sampling value and a second reference value. When the difference between the first difference and the second difference is less than a predetermined value, the signal processing circuit may therefore configure the conduction time or frequency of the switch.
Abstract:
An LED control device for configuring a phase-cut dimming system includes an LED and a switch. The LED control device configures the conduction status of the switch so as to supply power to the LED according to an input signal. The LED control device further detects whether the input signal is phase-cut. When the input signal is phase-cut, the LED control device stores the signal values of the internal circuits. Afterward, when the input signal is not phase-cut, the LED control device restores the stored signal values so that the internal circuits may resume to the previous operation status rapidly.
Abstract:
A control circuit for a power converter is disclosed, having a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is used for coupling with an output end of the power converter through a resistor. The driving circuit is used for conducting a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. When the difference between the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to adjust at least one of the conduction time and the conduction frequency of the switch according to an output signal of the power converter received from the shared pin.