Systems and methods for fault detection and exclusion in navigational systems

    公开(公告)号:US06856905B2

    公开(公告)日:2005-02-15

    申请号:US10426008

    申请日:2003-04-29

    CPC分类号: G01S19/20 G01S19/15

    摘要: The Fault Detection and Exclusion (FDE) system for use in navigational systems that rely upon multiple ranging signals, such as GPS satellites, uses an FDE algorithm to detect, as soon as possible, whether a fault exists in a signal associated with one or more of the GPS satellites. The system makes this determination by comparing a computed residual error with a first fault detection threshold. After determining that the computed residual error has exceeded the first, relatively low, fault detection threshold, the system transmits a signal to one or more external systems indicating that one or more signals associated with the various GPS satellites may be faulty. The system then monitors horizontal estimated position error (HUL) until this value has met or exceeded a relatively high fault isolation threshold value. The system then attempts to isolate and exclude the faulty satellite from the current navigational solution.

    Pixel data formatting
    3.
    发明授权
    Pixel data formatting 失效
    像素数据格式

    公开(公告)号:US5128658A

    公开(公告)日:1992-07-07

    申请号:US211778

    申请日:1988-06-27

    IPC分类号: G09G5/02 G09G5/06 G09G5/14

    CPC分类号: G09G5/026 G09G5/06 G09G5/14

    摘要: Pixel formats and a pixel mapping unit for use in a computer graphics terminal which provides an address input to a color look-up table. The disclosed pixel formats can be used to conserve frame buffer memory, color table memory, or both. For example, the formats support pseudo color or full color mapping, overlay planes, and color table bank select while using a minimum amount of memory. A valid plane feature is also supported, which can be used to enable rapid clearing of a window. The pixel mapping unit is especially handy in supporting multiple windows, because a unique mapping configuration word, which specifies how pixels are to be interpreted, may be specified for each window.

    摘要翻译: 像素格式和用于计算机图形终端中的像素映射单元,其为颜色查找表提供地址输入。 所公开的像素格式可用于节省帧缓冲存储器,色表存储器或两者。 例如,格式支持伪彩色或全色映射,重叠平面和彩色表格库选择,同时使用最小量的内存。 还支持有效的平面功能,可用于快速清除窗口。 像素映射单元特别方便地支持多个窗口,因为可以为每个窗口指定唯一的映射配置字,其指定如何解释像素。

    Semaphore controlled video chip loading in a computer video graphics
system
    4.
    发明授权
    Semaphore controlled video chip loading in a computer video graphics system 失效
    信号量控制视频芯片加载在计算机视频图形系统中

    公开(公告)号:US5058041A

    公开(公告)日:1991-10-15

    申请号:US206203

    申请日:1988-06-13

    IPC分类号: G09G5/14 G09G5/395

    CPC分类号: G09G5/395 G09G5/14

    摘要: A method and apparatus for updating the copies of state table values of a video data path chip set for a computer graphics system is provided. The apparatus uses off screen bitmap memory or other dual-ported memory in a frame buffer to store a shadow copy of the state that is stored in the video data path chips. The state tables include such things as color lookup tables, window definitions and cursors. A semaphore is used to prevent screen glitches caused by updating state tables from the copy of state table values that are partially modified. The state tables are loaded into the chips during vertical retrace, when the screen is being blanked. Before the CPU begins to update the shadow copy in the frame buffer, it claims the semaphore. If a vertical retrace occurs before the CPU has completed updating the frame buffer, the chips are not loaded during that vertical retrace. Before the chips start loading, a system timing chip claims the semaphore. The CPU cannot commence modifying the frame buffer until the load is finished.

    摘要翻译: 提供了一种用于更新计算机图形系统的视频数据路径芯片组的状态表值的副本的方法和装置。 该设备使用屏幕位图存储器或帧缓冲器中的其他双端口存储器来存储存储在视频数据路径芯片中的状态的影子副本。 状态表包括颜色查找表,窗口定义和光标等。 信号量用于防止从部分修改的状态表值的副本更新状态表导致的屏幕故障。 当屏幕被消隐时,状态表在垂直回扫期间加载到芯片中。 在CPU开始更新帧缓冲区中的卷影副本之前,它会声明信号量。 如果在CPU完成更新帧缓冲区之前发生垂直回扫,则在该垂直回扫期间芯片不会被加载。 在芯片开始加载之前,系统定时芯片要求信号量。 在负载完成之前,CPU无法开始修改帧缓冲区。

    Transformation circuit to effect raster operations
    5.
    发明授权
    Transformation circuit to effect raster operations 失效
    变换电路来实现光栅操作

    公开(公告)号:US4799173A

    公开(公告)日:1989-01-17

    申请号:US834600

    申请日:1986-02-28

    CPC分类号: G06T3/0006

    摘要: Circuitry to enable pixel signals, which represent information that is stored in a first section of memory (and which information defines an image, or images to be viewed on a CRT display) to be transferred to a different section of memory and in the course of the transferral be: expanded or reduced in number; and/or rotated, by arbitrary angles from the original orientation of the image; and/or have the holes, or missing pixels, which occur because of the rotation by the arbitrary angles filled in, or replaced.

    摘要翻译: 电路能够将存储在存储器的第一部分中的信息(以及哪些信息定义为图像或要在CRT显示器上观看的图像)的像素信号转移到存储器的不同部分,并且在 转移人数:扩大或减少数量; 和/或从图像的原始取向旋转任意角度; 和/或具有由于通过填充或替换的任意角度的旋转而发生的孔或缺失的像素。

    Systems and methods for fault detection and exclusion in navigational systems

    公开(公告)号:US06944541B2

    公开(公告)日:2005-09-13

    申请号:US10985858

    申请日:2004-11-10

    CPC分类号: G01S19/20 G01S19/15

    摘要: The Fault Detection and Exclusion (FDE) system for use in navigational systems that rely upon multiple ranging signals, such as GPS satellites, uses an FDE algorithm to detect, as soon as possible, whether a fault exists in a signal associated with one or more of the GPS satellites. The system makes this determination by comparing a computed residual error with a first fault detection threshold. After determining that the computed residual error has exceeded the first, relatively low, fault detection threshold, the system transmits a signal to one or more external systems indicating that one or more signals associated with the various GPS satellites may be faulty. The system then monitors horizontal estimated position error (HUL) until this value has met or exceeded a relatively high fault isolation threshold value. The system then attempts to isolate and exclude the faulty satellite from the current navigational solution.

    Method and system for distributed video compression in personal computer architecture

    公开(公告)号:US06411651B1

    公开(公告)日:2002-06-25

    申请号:US09105059

    申请日:1998-06-26

    IPC分类号: H04N712

    摘要: A method and system for compressing video data in a computer has video processing that is distributed between preprocessing hardware in a video capture/controller card and a central processing unit of the computer. Frames of video data are passed to a motion estimation unit of the preprocessing hardware. This unit generates motion information describing inter-frame changes in the video data. Next, motion-compensated temporal filtering is performed on the frames of video data using the motion information. A video frame processing unit of the controller card, used for processing video data to the monitor, is reused for the temporal filtering of the input video data. Finally, the temporally-filtered video data is passed to the central processing unit, which performs inter-frame and/or intra-frame compression with reference to the motion information. In this way, motion-compensated temporal filtering is performed, thus removing the associated noise without adding to the CPU's processing burden, but the costs associated with dedicated compression hardware are avoided by relying on the video capture capabilities in the video controller card.

    Method for choosing rate control parameters in motion-compensated transform-based picture coding scheme using non-parametric technique
    9.
    发明授权
    Method for choosing rate control parameters in motion-compensated transform-based picture coding scheme using non-parametric technique 失效
    使用非参数化技术在基于运动补偿变换的图像编码方案中选择速率控制参数的方法

    公开(公告)号:US06292589B1

    公开(公告)日:2001-09-18

    申请号:US08668153

    申请日:1996-06-21

    IPC分类号: G06K938

    摘要: A method of assigning quantization values for use during the compression of images is disclosed. The method includes constructing a non-parametric model during a training phase based on relationships between image characteristics, quantization values, and required bit resources to encode images. The model is built by considering a wide sample of images. The consideration includes determining the temporal and spatial characteristics of the images, compressing the images over a range of quantization values, and recording the resultant required bit resource on a per characterization/quantization level basis. Once built, the model may be used during real time compression by determining the characteristics of the input image and using the allocated resource to find a corresponding match in the non-parametric model. The associated quantization value is then assigned to the input image.

    摘要翻译: 公开了在压缩图像期间分配使用量化值的方法。 该方法包括基于图像特征,量化值和所需的位资源之间的关系在训练阶段中构建非参数模型以对图像进行编码。 该模型是通过考虑广泛的图像样本来构建的。 考虑包括确定图像的时间和空间特性,在一定范围的量化值上压缩图像,以及基于每个表征/量化级别记录所得到的所需位资源。 一旦构建,可以在实时压缩期间通过确定输入图像的特性并使用分配的资源在非参数模型中找到对应的匹配来使用该模型。 然后将相关联的量化值分配给输入图像。

    Self-timed programmable logic array with pre-charge circuit

    公开(公告)号:US4794570A

    公开(公告)日:1988-12-27

    申请号:US165456

    申请日:1988-03-01

    IPC分类号: H03K19/177 G11C13/00

    CPC分类号: H03K19/1772

    摘要: A programmable logic array includes a decoder section and an encoder section connected by a plurality of minterm conductors. The decoder section receives a plurality of input signals and in response selects appropriate ones of the minterm conductors. The selection of the minterm conductors enable the encoder selection to transmit a plurality of output signal on respective output conductors. The decoder and encoder sections include a plurality of stages, each controlling a minterm conductor and output conductor in response to the input signals and the selection of the minterm conductor. The stages include control transistors that are connected between a node, to which the respective minterm and output conductors are connected, and switches which enable and disable the control transistors. The nodes are initially precharged while the switches disable the respective transistors. After precharge, the switches enable the transistors in the decoder and encoder section respectively. A self timing circuit controls the switches to ensure that the switches are correctly timed.