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    Apparatus, systems and methods for controlling graphics and video data in multimedia data processing and display systems
    3.
    发明授权
    Apparatus, systems and methods for controlling graphics and video data in multimedia data processing and display systems 失效
    用于控制多媒体数据处理和显示系统中的图形和视频数据的装置，系统和方法

    公开(公告)号：US5598525A

    公开(公告)日：1997-01-28

    申请号：US376919

    申请日：1995-01-23

    申请人： Robert M. Nally ,  John C. Schafer

    发明人： Robert M. Nally ,  John C. Schafer

    IPC分类号： G06T11/20 ,  G06F15/00

    CPC分类号： G06T11/203

    摘要： A graphics and video controller 105 is provided which includes a dual aperture interface 206 for receiving words of graphics and video pixel data, each word of such data associated with an address directing that word to be processed as either graphics or video data. Circuitry 200, 201, 202, 207, 208 is provided for writing a word of the pixel data received from the interface 206 to a one of the on- and off-screen memory areas corresponding to the address associated with the received word. Circuitry 201, 202 is provided for selectively retrieving graphics and video data from the on-screen and off-screen memory areas. A first pipeline 205 is provided for processing data received from the on-screen area of frame buffer 107 while a second pipeline 204 is provided for processing data retrieved from the off-screen area of the frame buffer.

    摘要翻译： 提供了图形和视频控制器105，其包括用于接收图形和视频像素数据的单词的双孔径接口206，这些数据的每个单词与将要处理的字作为图形或视频数据相关联的地址相关联。 提供电路200,201,202,207,208，用于将从接口206接收的像素数据的字写入对应于与接收到的字相关联的地址的开和关屏幕之间的存储区域中的一个。 提供电路201,202用于从屏幕上和离屏存储区域选择性地检索图形和视频数据。 提供第一流水线205，用于处理从帧缓冲器107的屏幕上区域接收的数据，同时提供第二流水线204用于处理从帧缓冲器的屏幕外区域检索的数据。

    Video processor multiple streams of video data in real-time
    5.
    发明授权
    Video processor multiple streams of video data in real-time 失效
    视频处理器实时处理多个视频数据流

    公开(公告)号：US5440683A

    公开(公告)日：1995-08-08

    申请号：US328382

    申请日：1994-10-20

    申请人： Robert M. Nally ,  John C. Schafer

    发明人： Robert M. Nally ,  John C. Schafer

    IPC分类号： G11B27/02 ,  G11B27/031 ,  G11B27/032 ,  H04N5/262 ,  H04N5/91 ,  H04N5/92 ,  H04N9/79 ,  G06F15/00

    CPC分类号： H04N5/262 ,  G11B27/031

    摘要： A digital video editor employing a single chip special-purpose digital video processing unit (VPU) having the capability to combine several different digital video input signals into a single digital video output signal is disclosed. The VPU comprises a microprocessor operating under a set of instructions which is operative for receiving, storing and manipulating portions of an incoming digital video signal and a delay circuit, coupled to the microprocessor, for delaying execution of a particular instruction if a particular portion upon which the instruction is to operate has not yet been stored. The VPU processes multiple digitized video signals in real time in a time-sharing fashion because its processing speed is substantially greater than the rate at which it receives video data and processes multiple picture elements of a single digital stream simultaneously. In a preferred environment, The VPU operates in conjunction with an IBM compatible personal computer, an inexpensive general purpose computer. By processing video digitally, the VPU avoids generation loss and allows efficient digital compression and storage of video data.

    摘要翻译： 公开了一种采用单芯片专用数字视频处理单元（VPU）的数字视频编辑器，其具有将多个不同的数字视频输入信号组合成单个数字视频输出信号的能力。 VPU包括在一组指令下操作的微处理器，其操作用于接收，存储和操纵耦合到微处理器的输入数字视频信号和延迟电路的部分，用于延迟特定指令的执行，如果其上的特定部分 指令操作尚未存储。 VPU以时分方式实时处理多个数字化视频信号，因为它的处理速度明显大于其接收视频数据的速率并且同时处理单个数字流的多个图像元素。 在优选的环境中，VPU与IBM兼容的个人计算机（便宜的通用计算机）一起运行。 通过数字处理视频，VPU避免了生成丢失，并允许视频数据的高效数字压缩和存储。

    Apparatus, systems and methods for controlling graphics and video data in multimedia data processing and display systems
    6.
    再颁专利
    Apparatus, systems and methods for controlling graphics and video data in multimedia data processing and display systems 有权
    用于控制多媒体数据处理和显示系统中的图形和视频数据的装置，系统和方法

    公开(公告)号：USRE39898E1

    公开(公告)日：2007-10-30

    申请号：US09374041

    申请日：1999-08-13

    申请人： Robert M. Nally ,  John C. Schafer

    发明人： Robert M. Nally ,  John C. Schafer

    IPC分类号： G09G5/397 ,  G09G5/36 ,  G09G5/39 ,  G06F15/80 ,  G06F15/76 ,  G06T1/20

    CPC分类号： G06T11/203

    摘要： A graphics and video controller 105 is provided which includes a dual aperture interface 206 for receiving words of graphics and video pixel data, each word of such data associated with an address directing that word to be processed as either graphics or video data. Circuitry 200, 201, 202, 207, 208 is provided for writing a word of the pixel data received from the interface 206 to a one of the on- and off-screen memory areas corresponding to the address associated with the received word. Circuitry 201, 202 is provided for selectively retrieving graphics and video data from the on-screen and off-screen memory areas. A first pipeline 205 is provided for processing data received from the on-screen area of frame buffer 107 while a second pipeline 204 is provided for processing data retrieved from the off-screen area of the frame buffer.

    摘要翻译： 提供了图形和视频控制器105，其包括用于接收图形和视频像素数据的单词的双孔径接口206，这些数据的每个单词与将要处理的字作为图形或视频数据相关联的地址相关联。 电路200,201,202,207,208被提供用于将从接口206接收的像素数据的字写入对应于与接收到的字相关联的地址的开和关屏幕之间的存储区域中的一个。 提供电路201,202用于从屏幕上和离屏存储区域选择性地检索图形和视频数据。 提供第一流水线205，用于处理从帧缓冲器107的屏幕上区域接收的数据，同时提供第二流水线204用于处理从帧缓冲器的屏幕外区域检索的数据。

    Apparatus, systems and methods for providing multiple video data streams from a single source
    8.
    发明授权
    Apparatus, systems and methods for providing multiple video data streams from a single source 失效
    用于从单个源提供多个视频数据流的装置，系统和方法

    公开(公告)号：US5539465A

    公开(公告)日：1996-07-23

    申请号：US478937

    申请日：1995-06-07

    申请人： Frank Xu ,  Robert M. Nally

    发明人： Frank Xu ,  Robert M. Nally

    IPC分类号： H04N5/92 ,  H04N7/08

    CPC分类号： H04N7/0806 ,  H04N5/9205

    摘要： A method is provided for generating a plurality of displays from a composite video data stream comprising a plurality of frames each including two portions, a first portion of each frame containing data defining even fields of respective first and second displays and a second one of the portions of each frame containing data defining odd fields of the first and second displays. During first and second phases of a set of processing phases, data defining the odd and even fields of the first display are extracted from each received frame. Also during the first and third phases, the extracted data defining the odd and even fields of the first display are written into a first object buffer. During second and fourth phases of the set of processing phases, data defining the odd and even fields of the second display are extracted from each received frame. Also during the second and fourth phases, the extracted data defining the odd and even fields of the second display is written into a second object buffer. During the third and fourth phases, the first display data stored in the first object buffer is retrieved to drive a display device for generating the first display. During the second and fourth phases, the second display data stored in the second object buffer is retrieved to drive a display device for generating the second display.

    摘要翻译： 提供一种用于从包括多个帧的复合视频数据流生成多个显示器的方法，每个帧包括两个部分，每个帧的第一部分包含定义相应的第一和第二显示器的偶数场的数据，以及第二部分 每个帧包含定义第一和第二显示器的奇数场的数据。 在一组处理阶段的第一和第二阶段期间，从每个接收的帧中提取定义第一显示的奇数和偶数场的数据。 此外，在第一和第三阶段期间，定义第一显示的奇数和偶数场的提取数据被写入第一对象缓冲器。 在一组处理阶段的第二和第四阶段，从每个接收的帧中提取定义第二显示的奇数和偶数场的数据。 同样在第二和第四阶段期间，定义第二显示器的奇数和偶数场的提取数据被写入第二对象缓冲器。 在第三和第四阶段期间，检索存储在第一对象缓冲器中的第一显示数据，以驱动用于产生第一显示的显示装置。 在第二和第四阶段期间，检索存储在第二对象缓冲器中的第二显示数据，以驱动用于产生第二显示的显示装置。

    Method and apparatus for auxiliary pixel color management using monomap addresses which map to color pixel addresses
    9.
    发明授权
    Method and apparatus for auxiliary pixel color management using monomap addresses which map to color pixel addresses 失效
    用于辅助像素颜色管理的方法和装置，使用映射到彩色像素地址的单像地址

    公开(公告)号：US5251298A

    公开(公告)日：1993-10-05

    申请号：US661076

    申请日：1991-02-25

    申请人： Robert M. Nally

    发明人： Robert M. Nally

    IPC分类号： G06F9/38 ,  G06T17/00 ,  G09G5/02 ,  G06F15/00

    CPC分类号： G06F9/3877 ,  G06T17/00 ,  G09G5/02

    摘要： A pixel color processor that performs supplemental graphical processing duties in a video unit in a computer system. The pixel color processor is interfaced between a processor and video memory and performs pixel string manipulation and color management duties on the pixel color data at the direction of the processor, thereby freeing up the processor of these duties. The memory address space of the processor includes a monochrome memory area which maps onto the full-depth packed-pixel video memory. When the processor performs operations on this monochrome area, the pixel color processor intercepts the addresses data generated by the processor and performs the pixel block transfers.

    摘要翻译： 一种在计算机系统中的视频单元中执行补充图形处理任务的像素彩色处理器。 像素颜色处理器在处理器和视频存储器之间进行接口，并且在处理器的方向对像素颜色数据执行像素串操作和色彩管理任务，从而释放处理器的这些任务。 处理器的存储器地址空间包括映射到全深度压缩像素视频存储器的单色存储器区域。 当处理器对该单色区域执行操作时，像素彩色处理器截取由处理器生成的地址数据，并执行像素块传送。

    LPC transaction bridging across a PCI—express docking connection
    10.
    发明授权
    LPC transaction bridging across a PCI—express docking connection 有权
    LPC交易桥接跨PCI-express对接连接

    公开(公告)号：US07096308B2

    公开(公告)日：2006-08-22

    申请号：US10651521

    申请日：2003-08-29

    申请人： Kevin K. Main ,  Robert M. Nally

    发明人： Kevin K. Main ,  Robert M. Nally

    IPC分类号： G06F13/16

    CPC分类号： G06F13/4027 ,  G06F2213/0026

    摘要： A hybrid PCI_Express fabric system allows LPC bus commands and data to be sent across the PCI_Express fabric from a portable computer to its docking station. This permits the portable computer to be coupled to peripheral devices connected to the docking station without additional connectors on the portable computer and the docking station.

    摘要翻译： 混合PCI_Express结构系统允许LPC总线命令和数据通过PCI_Express结构从便携式计算机发送到其对接站。 这允许便携式计算机耦合到连接到对接站的外围设备，而无需在便携式计算机和对接站上的附加连接器。