Pressure balancing spool mixing valve
    1.
    发明申请
    Pressure balancing spool mixing valve 审中-公开
    压力平衡阀芯混合阀

    公开(公告)号:US20100058534A1

    公开(公告)日:2010-03-11

    申请号:US12230962

    申请日:2008-09-09

    IPC分类号: E03C1/04

    CPC分类号: F16K11/0787

    摘要: There is herein described a single handle pressure balancing spool valve for mixing user-adjustable hot and cold water flow to a fixture such as a shower or tub and to adjust the rate of mixed water flow. A rotatable disc with hot and cold intake openings and an outlet opening are provided which control the degree of covering on the inlet ports of the valve. Pressure balancing of inlet pressure is provided within the valve by means of a piston-cylinder assembly to compensate for fluctuations in water inlet pressure to avoid scalding of the user.

    摘要翻译: 这里描述了单手柄压力平衡滑阀,用于将用户可调节的热水和冷水流混合到诸如淋浴或浴缸的固定装置,并且调节混合水流量的速率。 提供了具有热和冷进气开口和出口的旋转盘,其控制阀的入口上的覆盖程度。 入口压力的压力平衡通过活塞 - 气缸组件提供在阀内,以补偿进水压力的波动,以避免用户的烫伤。

    Dual etchant process, particularly for gate recess fabrication in GaAs
MMIC chips
    2.
    发明授权
    Dual etchant process, particularly for gate recess fabrication in GaAs MMIC chips 失效
    双蚀刻工艺,特别适用于GaAs MMIC芯片中的栅极凹槽制造

    公开(公告)号:US5436201A

    公开(公告)日:1995-07-25

    申请号:US68871

    申请日:1993-05-28

    CPC分类号: H01L29/66863 H01L21/30612

    摘要: A semiconductor substrate is etched in a two-step sequence, with two different liquid etchants that have different lateral etch rates. The relative time periods for which the etchants are applied are selected to achieve a close match between the actual etch profile and the desired profile. The process is particularly applicable to the formation of a gate recess in a GaAs MESFET for high power amplification.

    摘要翻译: 用两步序列蚀刻半导体衬底,使用具有不同横向蚀刻速率的两种不同的液体蚀刻剂。 选择施加蚀刻剂的相对时间段以实现实际蚀刻轮廓和期望轮廓之间的紧密匹配。 该方法特别适用于在用于高功率放大的GaAs MESFET中形成栅极凹槽。

    Headphone amplifier circuit
    3.
    发明授权
    Headphone amplifier circuit 有权
    耳机放大器电路

    公开(公告)号:US07880548B2

    公开(公告)日:2011-02-01

    申请号:US12255537

    申请日:2008-10-21

    IPC分类号: H03F3/04

    摘要: A class G headphone amplifier circuit with improved power efficiency and low EMI. It may use an automatic signal level detector to detect the signal level of incoming signals and determine positive and negative power supplies for headphone amplifiers accordingly. A voltage generator may generate pairs of differential output voltages at a plurality of amplitude steps, and supply to headphone amplifiers the pair with the amplitude determined by the automatic signal level detector. As a result, headphone amplifiers are biased according to the input signal level, and the multiple voltage rails may improve power efficiency and avoid clipping.

    摘要翻译: A类G耳机放大器电路,具有改善的功率效率和低EMI。 它可以使用自动信号电平检测器来检测输入信号的信号电平,并相应地确定耳机放大器的正负电源。 电压发生器可以以多个幅度步长产生成对的差分输出电压,并以由自动信号电平检测器确定的振幅向耳机放大器提供该对。 结果,耳机放大器根据输入信号电平被偏置,并且多个电压轨可以提高功率效率并避免削波。

    Headphone Amplifier Circuit
    4.
    发明申请
    Headphone Amplifier Circuit 有权
    耳机放大器电路

    公开(公告)号:US20100097148A1

    公开(公告)日:2010-04-22

    申请号:US12255537

    申请日:2008-10-21

    IPC分类号: H03F3/04

    摘要: A class G headphone amplifier circuit with improved power efficiency and low EMI. It may use an automatic signal level detector to detect the signal level of incoming signals and determine positive and negative power supplies for headphone amplifiers accordingly. A voltage generator may generate pairs of differential output voltages at a plurality of amplitude steps, and supply to headphone amplifiers the pair with the amplitude determined by the automatic signal level detector. As a result, headphone amplifiers are biased according to the input signal level, and the multiple voltage rails may improve power efficiency and avoid clipping.

    摘要翻译: A类G耳机放大器电路,具有改善的功率效率和低EMI。 它可以使用自动信号电平检测器来检测输入信号的信号电平,并相应地确定耳机放大器的正负电源。 电压发生器可以以多个幅度步长产生成对的差分输出电压,并以由自动信号电平检测器确定的振幅向耳机放大器提供该对。 结果,耳机放大器根据输入信号电平被偏置,并且多个电压轨可以提高功率效率并避免削波。

    Process for providing clean lift-off of sputtered thin film layers
    5.
    发明授权
    Process for providing clean lift-off of sputtered thin film layers 失效
    提供溅射薄膜层清洁剥离的工艺

    公开(公告)号:US5705432A

    公开(公告)日:1998-01-06

    申请号:US566197

    申请日:1995-12-01

    IPC分类号: H01L21/027 H01L21/465

    CPC分类号: H01L21/0272 Y10S438/951

    摘要: A unique photoresist process is provided which achieves clean and complete lift-off of a thin film layer such as a sputtered thin film formed on a photoresist which is formed above a semiconductor substrate. The process of the present invention relies on a reentrant photoresist profile which breaks the continuity of the thin film layer. Accordingly, the process of the present invention ensures a clean lift-off. The desired photoresist profile which breaks the continuity of the thin film layer can be obtained by a typical photoresist process preceded by an oxidation process that takes place on the surface of the semiconductor substrate. The oxidation process provides a thin native oxide layer with thickness ranging from about 30 to 50 .ANG.. No extra processing steps involving dielectric film deposition and etch are required to achieve clean lift-off. Nevertheless, the process of the present invention ensures the clean lift-off of the thin film layer. Accordingly, the process of the present invention provides good visual and electrical yields.

    摘要翻译: 提供了一种独特的光刻胶工艺,其实现了清洁和完全剥离薄膜层,例如形成在半导体衬底上的光致抗蚀剂上形成的溅射薄膜。 本发明的方法依赖于破坏薄膜层的连续性的可重入光致抗蚀剂轮廓。 因此,本发明的方法确保了清洁的剥离。 可以通过在半导体衬底的表面上发生的氧化工艺之前的典型的光致抗蚀剂工艺来获得破坏薄膜层的连续性的期望的光致抗蚀剂轮廓。 氧化过程提供厚度范围为约30至50安培的薄的天然氧化物层。 不需要涉及介电膜沉积和蚀刻的额外处理步骤来实现干净的剥离。 然而,本发明的方法确保了薄膜层的清洁剥离。 因此,本发明的方法提供良好的视觉和电产量。

    Method of fabricating a self-aligned double recess gate profile
    6.
    发明授权
    Method of fabricating a self-aligned double recess gate profile 失效
    制造自对准双凹槽浇口型材的方法

    公开(公告)号:US5556797A

    公开(公告)日:1996-09-17

    申请号:US453676

    申请日:1995-05-30

    CPC分类号: H01L29/66871 H01L29/8128

    摘要: A method of fabricating a self-aligned double gate recess profile in a semiconductor substrate is disclosed in which a first mask layer is formed over the substrate. A second mask layer having an opening is formed over the first mask layer. An opening at least as wide as the second mask layer's opening is formed through the first mask layer to expose the substrate beneath the second mask layer's opening. A first recess is etched in the semiconductor through the second mask layer's opening. The first mask layer's opening is then uniformly expanded and a wider recess, aligned to the first recess, is then formed in the semiconductor. The method is particularly applicable to the formation of self-aligned gate and channel recesses in a GaAs MESFET.

    摘要翻译: 公开了一种在半导体衬底中制造自对准双栅凹槽轮廓的方法,其中在衬底上形成第一掩模层。 在第一掩模层上形成具有开口的第二掩模层。 通过第一掩模层形成至少与第二掩模层开口一样宽的开口,以将第二掩模层开口下方的基板曝光。 通过第二掩模层的开口在半导体中蚀刻第一凹槽。 然后将第一掩模层的开口均匀地膨胀,然后在半导体中形成与第一凹部对准的更宽的凹部。 该方法特别适用于GaAs MESFET中自对准栅极和沟槽的形成。

    Headphone amplifier circuit
    7.
    发明授权
    Headphone amplifier circuit 有权
    耳机放大器电路

    公开(公告)号:US08228124B2

    公开(公告)日:2012-07-24

    申请号:US12983412

    申请日:2011-01-03

    IPC分类号: H03F3/04

    摘要: A class G headphone amplifier circuit with improved power efficiency and low EMI. It may use an automatic signal level detector to detect the signal level of incoming signals and determine positive and negative power supplies for headphone amplifiers accordingly. A voltage generator may generate pairs of differential output voltages at a plurality of amplitude steps, and supply to headphone amplifiers the pair with the amplitude determined by the automatic signal level detector. As a result, headphone amplifiers are biased according to the input signal level, and the multiple voltage rails may improve power efficiency and avoid clipping.

    摘要翻译: A类G耳机放大器电路,具有改善的功率效率和低EMI。 它可以使用自动信号电平检测器来检测输入信号的信号电平,并相应地确定耳机放大器的正负电源。 电压发生器可以以多个幅度步长产生成对的差分输出电压,并以由自动信号电平检测器确定的振幅向耳机放大器提供该对。 结果,耳机放大器根据输入信号电平被偏置,并且多个电压轨可以提高功率效率并避免削波。