-
公开(公告)号：US5963065A
公开(公告)日：1999-10-05
申请号：US787301
申请日：1997-01-24
CPC分类号： H03F3/3077
摘要： A low offset amplifier has an output stage constituted by an npn transistor and a pnp transistor in a push-pull arrangement, and a driver stage. The latter includes a current-mirror circuit having, in its input branch, a pnp transistor in series with a first constant-current generator and, in its output branch, an npn transistor, and two complementary bipolar transistors with collectors connected together to the output terminal and the bases are connected together to the input terminal of the amplifier. The emitter of the pnp transistor of the driver stage is connected to the positive terminal of the supply by a second constant-current generator and to the base of the npn transistor of the output stage, and the emitter of the npn transistor of the driver stage is connected to the negative terminal of the supply by the npn transistor of the output branch of the current-mirror circuit and to the base of the pnp transistor of the output stage. The amplifier has a very low or zero offset (Vos=Vout-Vin).
摘要翻译： 低失调放大器具有由推挽装置中的npn晶体管和pnp晶体管构成的输出级和驱动级。 后者包括电流镜电路，其在其输入支路中具有与第一恒定电流发生器串联的pnp晶体管，并且在其输出支路中具有npn晶体管，以及两个互补双极晶体管，其中集电极连接到输出端 端子和基极连接到放大器的输入端子。 驱动器级的pnp晶体管的发射极通过第二恒流发生器连接到电源的正极端子，并连接到输出级的npn晶体管的基极，驱动器级的npn晶体管的发射极 通过电流镜电路的输出支路的npn晶体管和输出级的pnp晶体管的基极连接到电源的负极。 放大器具有非常低或零偏移（Vos = Vout-Vin）。
-
2.发明授权
公开(公告)号：US5821829A
公开(公告)日：1998-10-13
申请号：US810032
申请日：1997-03-04
CPC分类号： H03L7/0805 , H03L7/099
摘要： The system includes various circuit units each having a capacitor and a charging circuit for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop which uses one of the circuit units as an adjustable oscillator, and current transducer means which regulates the charging currents of the capacitors of the circuit units in dependence on the regulated charging current of the capacitor of the oscillator, or the error current of the PLL loop.
摘要翻译： 该系统包括各自具有电容器的电路单元和用于根据充电电流和电容器的电容之间的比率（I / C）定义量的充电电路。 为了自动补偿由于集成电路制造过程的参数波动引起的实际电容与标称电容的偏差，系统具有使用电路单元之一作为可调谐振荡器的锁相环，以及 电流传感器装置，其根据振荡器的电容器的调节的充电电流或PLL环路的误差电流来调节电路单元的电容器的充电电流。
-
公开(公告)号：US5914642A
公开(公告)日：1999-06-22
申请号：US777472
申请日：1996-12-30
CPC分类号： H03K3/2821
摘要： A current-controlled multivibrator having increased accuracy independent of variations in process and temperature. The oscillator employs a bandgap voltage in combination with a current generator to ensure operational stability despite temperature and process variations.
摘要翻译： 电流控制的多谐振荡器具有独立于工艺和温度变化的精度增加。 振荡器采用与电流发生器组合的带隙电压，以确保尽管温度和工艺变化，操作稳定性。
-
公开(公告)号：US6147825A
公开(公告)日：2000-11-14
申请号：US152866
申请日：1998-09-14
CPC分类号： H03K17/14 , H03K17/28 , G11B20/1403
摘要： A temperature-compensated high-speed timing circuit, which is particularly advantageous in read-interface circuits for disk-drive interface. The voltage on the integrating capacitor is compared against a voltage defined by the drop, on a resistor, induced by a current which is the combination of a reference current from a reference current generator with a temperature-dependent current from another current generator.
摘要翻译： 一种温度补偿高速定时电路，在磁盘驱动器接口的读取接口电路中特别有利。 将积分电容器上的电压与由电流引起的电压（由来自参考电流发生器的参考电流与来自另一电流发生器的温度相关电流的组合的电流）引起的电压进行比较。
-
公开(公告)号：US5808971A
公开(公告)日：1998-09-15
申请号：US726075
申请日：1996-10-03
CPC分类号： H03K17/14 , H03K17/28 , G11B20/1403
摘要： A temperature-compensated high-speed timing circuit, which is particularly advantageous in read-interface circuits for disk-drive interface. The voltage on the integrating capacitor is compared against a voltage defined by the drop, on a resistor, induced by a current which is the combination of a reference current from a reference current generator with a temperature-dependent current from another current generator.
-
6.发明授权Reduced current quadratic digital/analog converter with improved settling-time 失效减少电流二次数字/模拟转换器，提高了建立时间
公开(公告)号：US5748128A
公开(公告)日：1998-05-05
申请号：US645457
申请日：1996-05-13
摘要： A digital/analog quadratic converter (DACQ) composed by a pair of linear converters connected in cascade has a direct coupling of the output node of the first converter (DAC1) with a node of a R-2R type resistive network of the second converter (DAC2) corresponding to the LSB stage of the R-2R type resistive network. High impedance nodes, notably the input node of the second linear converter, are advantageously eliminated from the "current path" thus markedly reducing the problems of relatively long settling times of high impedance nodes (having intrinsically large parasitic capacitances associated therewith). The peculiar architecture of the quadratic converter provides also for a remarkable simplification of the circuit.
摘要翻译： 由串联连接的一对线性转换器组成的数字/模拟二次转换器（DACQ）具有第一转换器（DAC1）的输出节点与第二转换器的R-2R型电阻网络的节点的直接耦合 DAC2）对应于R-2R型电阻网络的LSB级。 有利地，从“电流路径”消除高阻抗节点，特别是第二线性转换器的输入节点，从而显着地减少了高阻抗节点（具有与其相关的本质上大的寄生电容）的较长建立时间的问题。 二次转换器的独特结构也为电路的显着简化提供了依据。
-
公开(公告)号：US06265910B1
公开(公告)日：2001-07-24
申请号：US09312402
申请日：1999-05-14
IPC分类号： H03K1700
CPC分类号： G11C27/024
摘要： A waveform track-and-hold circuit receives an analog input signal and generates an analog output signal. The waveform track-and-hold circuit includes a differential separating input stage, a differential separating output stage, first and second charge storage means, and switch means. The first and second charge storage means are coupled between the differential separating input stage and the differential separating output stage, and the switch means are controlled by a logic control signal so as to selectively isolate the first and second charge storage means from the analog input signal. Additionally, the differential separating input stage includes a push-pull input stage connected to the switch means and receiving the analog input signal. In a preferred embodiment, the analog input signal is supplied to the emitters of transistors that form the push-pull input stage, the collectors of the transistors are connected to the switch means, and the transistors are part of current mirror circuits.
摘要翻译： 波形跟踪保持电路接收模拟输入信号并产生模拟输出信号。 波形跟踪保持电路包括差分分离输入级，差分分离输出级，第一和第二电荷存储装置以及开关装置。 第一和第二电荷存储装置耦合在差分分离输入级和差分分离输出级之间，并且开关装置由逻辑控制信号控制，以便选择性地将第一和第二电荷存储装置与模拟输入信号 。 此外，差分分离输入级包括连接到开关装置并接收模拟输入信号的推挽输入级。 在优选实施例中，模拟输入信号被提供给形成推挽输入级的晶体管的发射极，晶体管的集电极连接到开关装置，晶体管是电流镜电路的一部分。
-
8.发明授权Circuit device for restoring the symmetry of an analog signal originated by the reading of data from magnetic supports 有权用于恢复由磁性支撑件读取数据而产生的模拟信号的对称性的电路装置公开(公告)号：US06707623B2
公开(公告)日：2004-03-16
申请号：US09802748
申请日：2001-03-08
IPC分类号： G11B502
CPC分类号： H03F3/45771 , G11B5/012 , G11B5/02 , G11B5/09
摘要： A circuit device for restoring the symmetry of an analog signal originated by the reading of data from magnetic supports, including at least one differential cell multiplier whose cell includes a pair of input MOS transistors having respective conduction terminals linked together at a circuit node. Advantageously, provided in parallel with each of the cell input transistors, are a plurality of transistors individually connectable to and disconnectable from each of the input transistors by corresponding switches.
摘要翻译： 一种电路装置，用于恢复由磁支架读取数据而产生的模拟信号的对称性，该电路装置包括至少一个差分单元乘法器，其中单元包括一对具有在电路节点连接在一起的导通端子的输入MOS晶体管。 有利地，与每个单元输入晶体管并联提供的是通过相应的开关单独地连接到每个输入晶体管并可与其分离的多个晶体管。
-
公开(公告)号：US5805015A
公开(公告)日：1998-09-08
申请号：US629320
申请日：1996-04-08
摘要： A current generator stage for integrated analog circuits includes a current source connected between a supply voltage and a ground terminal. A current mirror is operationally connected to the current source to generate an output current. A bias circuit is operationally connected to the current source to perform switching of the current source from a first operating mode to a second operating mode. The bias circuit includes an energy storage circuit which, in a first circuit configuration, supplies to the current source a first predetermined voltage when the current source is in the first operating mode. The energy storage circuit in a second circuit configuration is a combination of first and second reactances to supply to the current source a second predetermined voltage when the current source is in the second operating mode.
摘要翻译： 用于集成模拟电路的电流发生器级包括连接在电源电压和接地端子之间的电流源。 电流镜可操作地连接到电流源以产生输出电流。 偏置电路可操作地连接到电流源，以将电流源从第一操作模式切换到第二操作模式。 偏置电路包括能量存储电路，其在第一电路配置中，当电流源处于第一操作模式时，向电流源提供第一预定电压。 第二电路配置中的能量存储电路是第一和第二电抗的组合，以在电流源处于第二操作模式时向电流源提供第二预定电压。
-
公开(公告)号：US5714903A
公开(公告)日：1998-02-03
申请号：US575872
申请日：1995-12-21
CPC分类号： G06G7/163
摘要： An analog multiplier includes at least a differential output stage formed by a pair of emitter-coupled bipolar transistors. Each transistor of the pair of emitter-coupled bipolar transistors is driven by a predistortion stage having a reciprocal of a hyperbolic tangent transfer function that is attributable to the base currents of the bipolar transistors used in the predistortion stage. The error in the output signal produced by the analog multiplier is compensated by generating replicas of the base currents of the bipolar transistors of the differential output stage and forcing those replica currents on the output node of a respective predistortion stage. Various embodiments that consume different amounts of power are described.
摘要翻译： 模拟乘法器至少包括由一对发射极耦合双极晶体管形成的差分输出级。 一对发射极耦合双极晶体管中的每个晶体管由具有双曲正切传递函数的倒数的预失真级驱动，该双曲正切转移函数归因于在预失真级中使用的双极型晶体管的基极电流。 由模拟乘法器产生的输出信号中的误差通过产生差分输出级的双极晶体管的基极电流的副本并且迫使在相应的预失真级的输出节点上的那些复制电流来补偿。 描述消耗不同功率量的各种实施例。
-
-
-
-
-
-
-
-
-
搜索结果
30 条记录 (耗时 0.022 秒)
