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公开(公告)号：US4888561A
公开(公告)日：1989-12-19
申请号：US190050
申请日：1988-05-04
申请人： Ryushi Shimokawa , Seiichi Ueda , Yasuji Kamata , Kenkichi Yamashita , Kazuo Kato , Hideo Sato
发明人： Ryushi Shimokawa , Seiichi Ueda , Yasuji Kamata , Kenkichi Yamashita , Kazuo Kato , Hideo Sato
摘要： Herein disclosed are an amplifier and a display which uses the former. The amplifier includes a current amplifying circuit for sending out an amplified output current varying according to an input signal, and a current-voltage converting circuit for converting the output current of the current amplifying circuit into a voltage thereby to generate a high output voltage in response to the input signal. The supply voltage V.sub.cc1 of the current amplifying means and the supply voltage V.sub.cc2 of the current-voltage converting means are set separately of each other to have a relationship of V.sub.cc1
摘要翻译： 这里公开的是使用前者的放大器和显示器。 放大器包括用于发出根据输入信号变化的放大输出电流的电流放大电路和用于将电流放大电路的输出电流转换成电压的电流 - 电压转换电路，从而响应于产生高输出电压 到输入信号。 电流放大装置的电源电压Vcc1和电流 - 电压转换装置的电源电压Vcc2彼此分开地设定为具有Vcc1
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公开(公告)号：US4755768A
公开(公告)日：1988-07-05
申请号：US847721
申请日：1986-04-03
申请人： Ryushi Shimokawa , Seiichi Ueda , Yasuji Kamata , Kenkichi Yamashita , Kazuo Kato , Hideo Sato
发明人： Ryushi Shimokawa , Seiichi Ueda , Yasuji Kamata , Kenkichi Yamashita , Kazuo Kato , Hideo Sato
摘要： Herein disclosed are an amplifier and a display which uses the former. The amplifier includes a current amplifying circuit for sending out an amplified output current varying according to an input signal, and a current-voltage converting circuit for converting the output current of the current amplifying circuit into a voltage thereby to generate a high output voltage in response to the input signal. The supply voltage V.sub.cc1 of the current amplifying means and the supply voltage V.sub.cc2 of the current-voltage converting means are set separately of each other to have a relationship of V.sub.cc1
摘要翻译： 这里公开的是使用前者的放大器和显示器。 放大器包括用于发出根据输入信号变化的放大输出电流的电流放大电路和用于将电流放大电路的输出电流转换成电压的电流 - 电压转换电路，从而响应于产生高输出电压 到输入信号。 电流放大装置的电源电压Vcc1和电流 - 电压转换装置的电源电压Vcc2彼此分开地设定为具有Vcc1
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公开(公告)号：US4268136A
公开(公告)日：1981-05-19
申请号：US924009
申请日：1978-07-12
申请人： Haruji Ishihara , Ryushi Shimokawa , Michio Yagi , Kazuo Shiozawa , Kijiro Suzuki , Kazuhisa Aratame
发明人： Haruji Ishihara , Ryushi Shimokawa , Michio Yagi , Kazuo Shiozawa , Kijiro Suzuki , Kazuhisa Aratame
CPC分类号： G03B7/097
摘要： A camera in which the automatic exposure control is conducted on the basis of measured light information obtained in accordance with the illumination of an object to be photographed. In the camera, a type of exposure control information that is predetermined irrespective of measured light information is supplied as first exposure control information into an exposure control circuit including an analog to digital converter. Subsequently, measured light information obtained through the operation of a shutter release of the camera is supplied thereinto as second exposure control information.
摘要翻译： 基于根据被拍照物体的照度获得的测量光信息进行自动曝光控制的照相机。 在相机中，将与测量的光信息无关的预定类型的曝光控制信息作为第一曝光控制信息提供给包括模数转换器的曝光控制电路。 随后，通过操作相机的快门释放获得的测量光信息作为第二曝光控制信息被提供给其中。
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公开(公告)号：US4180797A
公开(公告)日：1979-12-25
申请号：US936136
申请日：1978-08-23
申请人： Ryushi Shimokawa
发明人： Ryushi Shimokawa
摘要： In a digital comparator wherein a period of time taken until one output signal of a decoder circuit coincides with one corresponding output signal of a frequency divider circuit is measured by comparing output signals of the decoder circuit and output signals of the frequency divider circuit, an output circuit of the decoder circuit and an output circuit of the frequency divider circuit are constructed of integrated injection logic (IIL) in order to build up wired AND circuits, and further, a NOR circuit which includes inverter circuits constructed of IIL and a common connection line for connecting outputs of the inverter circuits in common is disposed in order to receive respective outputs of the wired AND circuits. Especially, the digital comparator of this invention is effective for an automatic exposure control system of a camera.
摘要翻译： 在数字比较器中，通过比较解码器电路的输出信号和分频器电路的输出信号，测量直到解码器电路的一个输出信号与分频器电路的一个相应的输出信号一致为止的时间段，输出 解码器电路的电路和分频器电路的输出电路由集成注入逻辑（IIL）构成，以便建立有线的AND电路，此外，包括由IIL和公共连接线构成的反相器电路的NOR电路 为了接收有线AND电路的各个输出，设置用于连接逆变器电路的共同输出。 特别地，本发明的数字比较器对于照相机的自动曝光控制系统是有效的。
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公开(公告)号：US5818655A
公开(公告)日：1998-10-06
申请号：US506635
申请日：1995-07-25
申请人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
发明人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10481 , G11B5/035 , G11B5/09
摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
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公开(公告)号：US4198142A
公开(公告)日：1980-04-15
申请号：US924756
申请日：1978-07-14
申请人： Michio Yagi , Kazuo Shiozawa , Kijiro Suzuki , Kazuhisa Aratame , Haruji Ishihara , Ryushi Shimokawa
发明人： Michio Yagi , Kazuo Shiozawa , Kijiro Suzuki , Kazuhisa Aratame , Haruji Ishihara , Ryushi Shimokawa
CPC分类号： G03B43/00 , G03B7/0807
摘要： The power supply resetting circuit of the invention is adapted to be used in such a type of camera that the shutter release action comprises two steps of strokes: a first stroke by which a power supply circuit for electric circuits mounted in the camera, such as a light measuring circuit, is closed, and a second stroke by which at least the operation of the circuits mounted in the camera is started. The power supply resetting circuit has a self-holding circuit for closing the power supply circuit and additionally mounted to the electric circuits in the camera. The self-holding circuit is adapted to be turned into operation by the second stroke of the shutter release action, substantially simultaneously with the starting of operation of the circuits mounted in the camera, and to be turned inoperative, so as to break the power supply circuit, at the instant at which the photographing sequence is completed or with a certain time lag to that instant.
摘要翻译： 本发明的电源复位电路适用于这种类型的相机，其中快门释放动作包括两个步骤：第一行程，用于安装在相机中的电路的电源电路，例如 光测量电路闭合，并且第二行程至少开始安装在照相机中的电路的操作。 电源复位电路具有用于闭合电源电路的自保持电路，并且另外安装在照相机中的电路上。 自动保持电路适于通过快门释放动作的第二行程转换为操作，与安装在照相机中的电路的操作开始基本同时，并且不能工作，以便断开电源 电路，在拍摄顺序完成的时刻或者一定时间滞后到那个时刻。
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7.发明授权Signal processing circuit and information recording/reproducing apparatus using the same, and method for optimizing coefficients of equalizer circuit 有权信号处理电路和使用该信号的信息记录/再现装置，以及用于优化均衡器电路的系数的方法公开(公告)号：US06661594B2
公开(公告)日：2003-12-09
申请号：US10277695
申请日：2002-10-23
申请人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
发明人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
IPC分类号： G11B535
CPC分类号： G11B20/10055 , G11B5/035 , G11B5/09 , G11B20/10009 , G11B20/10481
摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
摘要翻译： 一种用于至少包括AGC，PLL，LPF，均衡器电路和检测电路的磁记录/再现装置的信号处理电路，其中通过定义均衡器电路的结构形成系数补偿电路，错误 提供检测电路，其通过接收来自检测电路的输入而工作，并且LSI由多个模拟和数字芯片形成，并且模拟和数字芯片通过电流输出型D / A转换器连接至少至少 AGC和PLL。
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8.发明授权
公开(公告)号：US5805024A
公开(公告)日：1998-09-08
申请号：US536264
申请日：1995-09-29
申请人： Terumi Takashi , Naoki Satoh , Akihiko Hirano , Eisaku Saiki , Masakazu Hosino , Ryushi Shimokawa
发明人： Terumi Takashi , Naoki Satoh , Akihiko Hirano , Eisaku Saiki , Masakazu Hosino , Ryushi Shimokawa
CPC分类号： H03L7/087 , G11B20/10009 , G11B20/1403 , H03L7/107 , G11B5/012
摘要： A phase lock loop system includes: a phase detecting circuit which operates on the basis of a signal waveform; a current output circuit for generating a current value from a phase difference detected by the phase detecting circuit; a filter which is constructed by only a resistor in a phase locked state by a synchronizing signal and by a capacitor and the resistor upon phase following state; and a voltage controlled oscillator for controlling an oscillation frequency by a voltage output of the filter. The phase lock loop system operates as a primary phase lock loop circuit in the phase locked state by the synchronizing signal and operates as a secondary phase lock loop circuit upon phase following state.
摘要翻译： 锁相环系统包括：基于信号波形进行工作的相位检测电路; 电流输出电路，用于根据由相位检测电路检测的相位差产生电流值; 由相位锁定状态的电阻器由同步信号和电容器构成的滤波器以及相位跟随状态下的电阻器; 以及用于通过滤波器的电压输出来控制振荡频率的压控振荡器。 锁相环系统通过同步信号作为锁相状态的主锁相环电路工作，并且在相位跟随状态下作为次锁相环电路工作。
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9.发明授权Digital signal processor, error detection method, and recording medium reproducer 失效数字信号处理器，错误检测方法和记录介质再现器
公开(公告)号：US5774470A
公开(公告)日：1998-06-30
申请号：US524040
申请日：1995-09-06
IPC分类号： G06F11/10 , G11B20/10 , G11B20/18 , H03H15/00 , H03H17/00 , H03H21/00 , H03M13/23 , H03M13/41 , H04B3/04
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/18 , H03M13/41 , H03M13/6331 , H03M13/6505
摘要： A playback signal processing circuit for reducing decode errors and enabling high-density digital magnetic recording and a digital magnetic recording reproducing unit using the playback signal processing circuit are provided. An estimated waveform generation circuit uses the decoding result of a PRML channel to generate an ideal playback signal waveform. A subtractor provides a waveform representing a difference between the waveform and an actual playback signal. There is a high probability that error bits will occur at an interval of two or four bits because of the nature of GCR code and maximum-likelihood decoding; in the error state of each bit, one bit is incremented by one with respect to the correct bit value and the other signal bit is decremented by one. From this fact, an error detection circuit discriminates an error difference waveform pattern and an error discrimination circuit detects an error bit interval, whereby an error correction circuit carries out error bit correction.
摘要翻译： 提供了一种用于减少解码错误并实现高密度数字磁记录的重放信号处理电路和使用重放信号处理电路的数字磁记录再现单元。 估计波形生成电路使用PRML通道的解码结果来产生理想的重放信号波形。 减法器提供表示波形和实际重放信号之间的差异的波形。 由于GCR码的性质和最大似然解码，错误位将以两位或四位的间隔发生的概率很高; 在每个位的错误状态下，一个比特相对于正确的比特值递增1，另一个比特递减1。 根据该事实，误差检测电路鉴别误差波形图案，误差鉴别电路检测误差位间隔，由此误差校正电路进行错误位校正。
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公开(公告)号：US4492450A
公开(公告)日：1985-01-08
申请号：US423783
申请日：1982-09-27
申请人： Koji Watanabe , Kazuo Shiozawa , Kiziro Suzuki , Ryushi Shimokawa
发明人： Koji Watanabe , Kazuo Shiozawa , Kiziro Suzuki , Ryushi Shimokawa
CPC分类号： G03B7/093
摘要： A camera having a microprocessor made receptive of various photographic informations through interrupt processing. The information at a higher priority level of said various photographic informations such as a release signal, a photometry start signal and a photometry introduction signal is fed to said microprocessor by the interrupting operation having a shorter period than that of the information at a lower priority level. The interrupt processing are periodic ones, and wherein an inequality of m
摘要翻译： 具有通过中断处理接收各种照相信息的微处理器的相机。 所述各种照相信息的更高优先级的信息，诸如释放信号，测光开始信号和测光引入信号，通过具有比较低优先级的信息周期短的中断操作被馈送到所述微处理器 。 中断处理是周期性的，并且当在所述各种照相信息的较高优先级下的信息被馈送与中断周期的m倍的时间段时，m
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