公开(公告)号：US20180090444A1

公开(公告)日：2018-03-29

申请号：US15711819

申请日：2017-09-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Jin LEE ,  Dong Hun LEE

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L29/06 ,  H01L2224/0231 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05569 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/21 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/73204 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10156 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/35121 ,  H01L2924/00014

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant filling at least portions of spaces between walls of the through-hole and side surfaces of the semiconductor chip; and a second interconnection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip through vias, wherein the side surface of the semiconductor chip has a step portion.

公开(公告)号：US20190122949A1

公开(公告)日：2019-04-25

申请号：US15925338

申请日：2018-03-19

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Dong Hun LEE

IPC: H01L23/31 ,  H01L23/16 ,  H01L23/00

Abstract: A semiconductor package including an organic interposer includes: the organic interposer including insulating layers and wiring layers formed on the insulating layers; a stiffener disposed on the interposer and having a through-hole; a first semiconductor chip disposed in the organic through-hole on the organic interposer; a second semiconductor chips disposed adjacent to the first semiconductor chip in the through-hole on the organic interposer; and an underfill resin filling at least portions of the through-hole and fixing the first semiconductor chip and the second semiconductor chip, wherein the connection pads of the first semiconductor chip and the second semiconductor chip are electrically connected to each other through the wiring layers of the organic interposer.

公开(公告)号：US20180090443A1

公开(公告)日：2018-03-29

申请号：US15453588

申请日：2017-03-08

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Jin LEE ,  Dong Hun LEE

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/05124 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10156 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/35121

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant filling at least portions of spaces between walls of the through-hole and side surfaces of the semiconductor chip; and a second interconnection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip through vias, wherein the side surface of the semiconductor chip has a step portion.