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公开(公告)号：US20220351909A1
公开(公告)日：2022-11-03
申请号：US17858370
申请日：2022-07-06
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Min Gon LEE , Seung Woo SONG , Jae Yeol CHOI , Jin Kyung JOO , Taek Jung LEE , Jin Man JUNG
Abstract: A multilayer ceramic electronic component includes: a ceramic body and first and second external electrodes on external surfaces of the ceramic body. The ceramic body includes first and second internal electrodes facing each other with dielectric layers interposed therebetween. The ceramic body includes an active portion in which capacitance is formed and cover portions on upper and lower surfaces of the active portion, respectively. The ratio of the thickness of the first and second external electrodes to the thickness of the cover portion is proportional to the inverse of the cube root of the ratio of the Young's Modulus of each of the first and second external electrodes to the Young's modulus of the cover portion.
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公开(公告)号：US20210005392A1
公开(公告)日：2021-01-07
申请号：US16855272
申请日：2020-04-22
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Taek Jung LEE , Min Gon LEE , Jea Yeol CHOI , Jin Man JUNG , Jin Kyung JOO
Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes disposed with the dielectric layer interposed therebetween and disposed in point-symmetry with each other; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the body and connected to the first and second connection electrodes; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, and the first and second internal electrodes include a region in which an electrode is not disposed.
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公开(公告)号：US20180090275A1
公开(公告)日：2018-03-29
申请号：US15484311
申请日：2017-04-11
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Won Young LEE , Sung Kwon AN , Taek Jung LEE , Jin Kyung JOO , Hyo Youn LEE
CPC classification number: H01G4/30 , H01G4/005 , H01G4/012 , H01G4/12 , H01G4/1227 , H01G4/228 , H01G4/232 , H05K1/181 , H05K2201/10015 , Y02P70/611
Abstract: A multilayer capacitor includes a body including dielectric layers, and first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween, first and second groove parts formed in external surfaces of the body in a first direction in which the dielectric layers are stacked, having at least one corner, and contacting the first and second internal electrodes, respectively, and first and second connection electrodes disposed in the first and second groove parts, respectively, and electrically connected to the first and second internal electrodes, respectively.
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公开(公告)号：US20180068793A1
公开(公告)日：2018-03-08
申请号：US15485555
申请日：2017-04-12
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Taek Jung LEE , Hyo Youn LEE , Won Young LEE , Sung Kwon AN , Jae Yeol CHOI , Jin Kyung JOO
Abstract: A capacitor component includes a body, a plurality of internal electrodes disposed in the body, connection electrodes extended in a thickness direction of the body and electrically connected to the plurality of internal electrodes, upper electrodes disposed on an upper surface of the body and electrically connected to the connection electrodes, and lower electrodes disposed on a lower surface of the body and electrically connected to the connection electrodes A thickness of the upper electrodes is different from that of the lower electrodes, and an area of contact between the upper electrodes and the body is different from an area of contact between the lower electrodes and the body.
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公开(公告)号：US20160225524A1
公开(公告)日：2016-08-04
申请号：US14981650
申请日：2015-12-28
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Kyung JOO , Byoung Hwa LEE , Tae Ho KIM , Doo Young KIM , Taek Jung LEE , Sin Il GU
CPC classification number: H01G4/12 , H01G4/008 , H01G4/1209
Abstract: A method of manufacturing a multilayer ceramic electronic component includes preparing a multilayer structure in which dielectric layers containing an alumina base material and internal electrode layers containing nickel are alternately stacked, plasticizing the multilayer structure by heating to a temperature of 500 to 900° C. at a first heating rate under a first reducing atmosphere at a first hydrogen concentration, sintering the multilayer structure by heating to a temperature of 1,250° C. to 1,400° C. at a second heating rate greater than the first heating rate under a second reducing atmosphere at a second hydrogen concentration higher than the first hydrogen concentration, and then maintaining the temperature of 1,250° C. to 1,400° C., and annealing the multilayer structure by cooling the multilayer structure to room temperature at a first cooling rate.
Abstract translation: 一种制造多层陶瓷电子部件的方法包括制备多层结构，其中包含氧化铝基底材料和含有镍的内部电极层的电介质层交替堆叠，通过加热至500至900℃的温度来增塑多层结构 在第一氢气浓度的第一还原气氛下的第一加热速率，通过在第二还原气氛下以大于第一加热速率的第二加热速率加热至1250℃至1400℃的温度来烧结多层结构 在比第一氢浓度高的第二氢浓度下，然后将温度保持在1250℃至1400℃，并通过以多个第一冷却速率将多层结构冷却至室温来退火多层结构。
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Patent Agency Ranking
公开(公告)号：US20230162918A1
公开(公告)日：2023-05-25
申请号：US17983117
申请日：2022-11-08
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Taek Jung LEE , Sang Moon LEE , Chang Ho SEO , Hwi Dae KIM , Chul Seung LEE
CPC classification number: H01G4/1272 , H01G4/012 , H01G4/248 , H01G4/2325 , H01G4/30
Abstract: A multilayer ceramic electronic component includes: a body including a dielectric layer and a plurality of internal electrodes stacked on each other having the dielectric layer interposed therebetween; and an external electrode disposed externally on the body and connected to one or more of the internal electrodes. The body includes a first region in contact with the external electrode and a second region not in contact with the external electrode, and R1/R2 satisfies 3 to 15 in which R1 indicates a surface roughness Ra of the first region and R2 indicates a surface roughness of the second region.
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公开(公告)号：US20220102080A1
公开(公告)日：2022-03-31
申请号：US17546385
申请日：2021-12-09
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Taek Jung LEE , Min Gon LEE , Jea Yeol CHOI , Jin Man JUNG , Jin Kyung JOO
Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes disposed with the dielectric layer interposed therebetween and disposed in point-symmetry with each other; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the body and connected to the first and second connection electrodes; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, and the first and second internal electrodes include a region in which an electrode is not disposed.
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公开(公告)号：US20190074137A1
公开(公告)日：2019-03-07
申请号：US16004830
申请日：2018-06-11
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jong Pil LEE , Hyo Youn LEE , Sung Kwon AN , Seung Woo SONG , Taek Jung LEE , Jin Kyung JOO
Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to amounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.
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公开(公告)号：US20190066924A1
公开(公告)日：2019-02-28
申请号：US16003792
申请日：2018-06-08
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Seung Woo SONG , Jin Kyung JOO , Hyo Youn LEE , Taek Jung LEE , Sung Kwon AN
Abstract: A multilayer ceramic capacitor includes a capacitive portion, a protective part, and first and second connecting electrodes. The capacitive portion includes a first dielectric layer and first and second internal electrodes disposed with the first dielectric layer interposed therebetween. The protective part is disposed on one surface of the capacitive portion and includes a second dielectric layer and first and second electrode patterns disposed to be spaced apart from each other. The first connecting electrode penetrates through the protective part and the capacitive portion and is connected to the first internal electrode and the first electrode pattern, and the second connecting electrode penetrates through the protective part and the capacitive portion and is connected to the second internal electrode and the second electrode pattern.
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公开(公告)号：US20190066922A1
公开(公告)日：2019-02-28
申请号：US15955280
申请日：2018-04-17
Applicant: Samsung Electro-Mechanics, Co., Ltd.
Inventor： Taek Jung LEE , Jin Kyung JOO , Seung Woo SONG , Hyo Youn LEE , Sung Kwon AN
Abstract: A capacitor component includes a body including an active layer and an upper cover and a lower cover disposed on an upper part and a lower part of the active layer, respectively; first internal electrodes and second internal electrodes disposed inside the active layer; a first active via and a second active via extending in a thickness direction of the active layer to be connected to the first and second internal electrodes, respectively; first and second cover vias extending in a thickness direction of the lower cover to be electrically connected to the first and second active vias and disposed at an interval narrower than an interval between the first and second active vias; and first and second lower electrodes disposed in a lower surface of the lower cover to be connected to the first and second cover vias, respectively.
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