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    Test system that performs simultaneous tests of multiple test units
    2.
    发明授权
    Test system that performs simultaneous tests of multiple test units 有权
    同时测试多个测试单元的测试系统

    公开(公告)号：US09575112B2

    公开(公告)日：2017-02-21

    申请号：US14673490

    申请日：2015-03-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： In-Wook Oh ,  Chin Kim ,  Sunhom Steve Paak ,  Jae-Seok Yang

    IPC: G01R31/36 ,  G01R31/26 ,  G01R31/3185 ,  G01R31/317 ,  G01R31/319

    CPC classification number: G01R31/2607 ,  G01R31/2601 ,  G01R31/31722 ,  G01R31/318511 ,  G01R31/31926

    Abstract: A test system includes row decoder, column decoder, row test controller, and test circuit. The row decoder activates one of first through M-th row signals based on plurality of row input signals. The column decoder activates one of first through N-th column signals based on plurality of column input signals. The row test controller outputs first through N-th column output signals, which are activated, when row test enable signal is activated. The row test controller outputs the first through N-th column signals as the first through N-th column output signals respectively when the row test enable signal is deactivated. The test circuit includes first through M-th row test blocks, each of which includes first through N-th test units. The test circuit simultaneously performs short test of the first through N-th test units included in row test block when the row test enable signal is activated.

    Abstract translation: 测试系统包括行解码器，列解码器，行测试控制器和测试电路。 行解码器基于多个行输入信号来激活第一至第M行信号中的一个。 列解码器基于多个列输入信号来激活第一至第N列信号中的一个。 当行测试使能信号被激活时，行测试控制器首先输出第N列输出信号，这些信号被激活。 当行测试使能信号被去激活时，行测试控制器分别输出第一至第N列信号作为第一至第N列输出信号。 测试电路包括第一至第M行测试块，每个测试块包括第一至第N个测试单元。 当行测试使能信号被激活时，测试电路同时执行包括在行测试块中的第一至第N测试单元的短测试。

    TEST SYSTEM THAT PERFORMS SIMULTANEOUS TESTS OF MULTIPLE TEST UNITS
    3.
    发明申请
    TEST SYSTEM THAT PERFORMS SIMULTANEOUS TESTS OF MULTIPLE TEST UNITS 有权
    同时测试多个测试单元的测试系统

    公开(公告)号：US20160047853A1

    公开(公告)日：2016-02-18

    申请号：US14673490

    申请日：2015-03-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： IN-WOOK OH ,  Chin Kim ,  Sunhom Steve Paak ,  Jae-Seok Yang

    IPC: G01R31/26

    CPC classification number: G01R31/2607 ,  G01R31/2601 ,  G01R31/31722 ,  G01R31/318511 ,  G01R31/31926

    Abstract: A test system includes row decoder, column decoder, row test controller, and test circuit. The row decoder activates one of first through M-th row signals based on plurality of row input signals. The column decoder activates one of first through N-th column signals based on plurality of column input signals. The row test controller outputs first through N-th column output signals, which are activated, when row test enable signal is activated. The row test controller outputs the first through N-th column signals as the first through N-th column output signals respectively when the row test enable signal is deactivated. The test circuit includes first through M-th row test blocks, each of which includes first through N-th test units. The test circuit simultaneously performs short test of the first through N-th test units included in row test block when the row test enable signal is activated.

    Abstract translation: 测试系统包括行解码器，列解码器，行测试控制器和测试电路。 行解码器基于多个行输入信号来激活第一至第M行信号中的一个。 列解码器基于多个列输入信号来激活第一至第N列信号中的一个。 当行测试使能信号被激活时，行测试控制器首先输出第N列输出信号，这些信号被激活。 当行测试使能信号被去激活时，行测试控制器分别输出第一至第N列信号作为第一至第N列输出信号。 测试电路包括第一至第M行测试块，每个测试块包括第一至第N个测试单元。 当行测试使能信号被激活时，测试电路同时执行包括在行测试块中的第一至第N测试单元的短测试。

    Semiconductor device and method of fabricating the same
    4.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US12142587B2

    公开(公告)日：2024-11-12

    申请号：US18448066

    申请日：2023-08-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jinho Park ,  Chin Kim ,  Yongseung Bang ,  Jiyeon Baek ,  Jeong Hoon Ahn

    IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532

    Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    7.
    发明公开
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20230395541A1

    公开(公告)日：2023-12-07

    申请号：US18448066

    申请日：2023-08-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jinho Park ,  Chin Kim ,  Yongseung Bang ,  Jiyeon Baek ,  Jeong Hoon Ahn

    IPC: H01L23/00 ,  H01L23/522

    CPC classification number: H01L24/05 ,  H01L24/13 ,  H01L23/53238 ,  H01L23/5226 ,  H01L2224/05686 ,  H01L24/03

    Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.

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