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公开(公告)号：US20220359379A1
公开(公告)日：2022-11-10
申请号：US17866782
申请日：2022-07-18
发明人： Suhyun Bark , Kyeongbeom Park , Jongmin Baek , Jangho Lee , Wookyung You , Deokyoung Jung
IPC分类号： H01L23/522 , H01L23/528 , H01L27/088
摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.
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公开(公告)号：US11139244B2
公开(公告)日：2021-10-05
申请号：US16793366
申请日：2020-02-18
发明人： Jangho Lee , Jongmin Baek , Wookyung You , Kyu-Hee Han , Suhyun Bark
IPC分类号： H01L23/528 , H01L21/768 , H01L23/522
摘要： Disclosed is a semiconductor device comprising a substrate, a first dielectric layer on the substrate, a first lower conductive line in the first dielectric layer, an etch stop layer on the first dielectric layer, a via-structure that penetrates the etch stop layer and connects to the first lower conductive line, a second dielectric layer on the etch stop layer, and an upper conductive line that penetrates the second dielectric layer and connects to the via-structure. The first dielectric layer includes a dielectric pattern at a level higher than a top surface of the first lower conductive line. The upper conductive line is in contact with a top surface of the etch stop layer. The etch stop layer has at an upper portion a rounded surface in contact with the via-structure.
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公开(公告)号：US20210043561A1
公开(公告)日：2021-02-11
申请号：US16877088
申请日：2020-05-18
发明人： YEONGGIL KIM , Jongmin Baek , Wookyung You , Kyuhee Han
IPC分类号： H01L23/522 , H01L21/768 , H01L23/528
摘要： A semiconductor device includes a contact structure connected to an active region. A first insulating layer is disposed on a barrier dielectric layer and has a first hole connected to the contact structure. A second insulating layer is disposed on the first insulating layer and has a trench connected to the first hole. The second insulating layer has an extended portion along a side wall of the first hole. A width of the first hole less the space occupied by the extended portion is defined as a second hole. A wiring structure including a conductive material is connected to the contact structure. A conductive barrier is disposed between the conductive material and the first and second insulating layers. An etch stop layer is disposed between the first and second insulating layers and between the extended portion of the second insulating layer and a side wall of the first hole.
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公开(公告)号：US09972528B2
公开(公告)日：2018-05-15
申请号：US15374053
申请日：2016-12-09
发明人： VietHa Nguyen , Thomas Oszinda , Jongmin Baek , Sanghoon Ahn , Byunghee Kim , Wookyung You , Naein Lee
IPC分类号： H01L29/00 , H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L21/7682 , H01L21/76802 , H01L21/76832 , H01L21/76834 , H01L21/76843 , H01L21/76877 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L23/53295
摘要： A semiconductor device may include a substrate, a first interlayered insulating layer on the substrate having openings, conductive patterns provided in the openings, first to fourth insulating patterns stacked on the substrate provided with the conductive patterns, and a second interlayered insulating layer provided on the fourth insulating pattern.
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公开(公告)号：US09748170B2
公开(公告)日：2017-08-29
申请号：US15146112
申请日：2016-05-04
发明人： Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Naein Lee
IPC分类号： H01L23/00 , H01L23/522 , H01L23/532 , H01L23/528 , H01L21/768 , H01L21/764
CPC分类号： H01L23/5226 , H01L21/764 , H01L21/76802 , H01L21/76816 , H01L21/7682 , H01L21/76837 , H01L21/76843 , H01L21/76877 , H01L23/5222 , H01L23/528 , H01L23/53223 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L2924/00 , H01L2924/0002
摘要： A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns disposed on the first conductive patterns. Respective air gaps are disposed between adjacent ones of the first conductive patterns overlying a first region of the substrate, while adjacent ones of the first conductive patterns overlying a second region of the substrate do not have air gaps disposed therebetween. The air gaps may include first air gaps, and the device may further include second air gaps disposed between adjacent ones of the second conductive patterns in the second region. Adjacent ones of the second conductive patterns overlying a second region of the substrate may not have air gaps disposed therebetween.
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公开(公告)号：US09558994B2
公开(公告)日：2017-01-31
申请号：US15205168
申请日：2016-07-08
发明人： Wookyung You , Sanghoon Ahn , Sangho Rha , Jongmin Baek , Nae-In Lee
IPC分类号： H01L21/768 , H01L23/485 , H01L23/522 , H01L23/528 , H01L23/532
CPC分类号： H01L21/7682 , H01L21/76816 , H01L21/76829 , H01L21/76831 , H01L21/76837 , H01L21/76843 , H01L21/76849 , H01L21/7685 , H01L21/76877 , H01L21/76879 , H01L23/485 , H01L23/5222 , H01L23/5226 , H01L23/528 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a substrate including a first region and a second region, first conductive patterns disposed on the first region and spaced apart from each other by a first distance, second conductive patterns disposed on the second region and spaced apart from each other by a second distance greater than the first distance, and an interlayer insulating layer disposed between the second conductive patterns and including at least one recess region having a width corresponding to the first distance.
摘要翻译： 一种半导体器件包括：包括第一区域和第二区域的衬底;第一导电图案，设置在第一区域上并且彼此间隔开第一距离;第二导电图案，设置在第二区域上并且彼此间隔开 第二距离大于第一距离，以及层间绝缘层，设置在第二导电图案之间并且包括具有对应于第一距离的宽度的至少一个凹部区域。
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公开(公告)号：US12014980B2
公开(公告)日：2024-06-18
申请号：US18446524
申请日：2023-08-09
发明人： Suhyun Bark , Kyeongbeom Park , Jongmin Baek , Jangho Lee , Wookyung You , Deokyoung Jung
IPC分类号： H01L21/00 , H01L23/522 , H01L23/528 , H01L27/088
CPC分类号： H01L23/5226 , H01L23/528 , H01L27/088
摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.
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公开(公告)号：US20210391254A1
公开(公告)日：2021-12-16
申请号：US17155126
申请日：2021-01-22
发明人： Wookyung You , Kyeongbeom Park , Sungbin Park , Suhyun Park , Jongmin Baek , Jangho Lee , Seonghun Lim , Deokyoung Jung , Kyuhee Han
IPC分类号： H01L23/522 , H01L23/528
摘要： A semiconductor device includes a first insulating layer disposed on a substrate, a first wiring disposed in the first insulating layer, a first insulating barrier layer disposed on the first insulating layer, an etch-stop layer disposed on the first insulating barrier layer and having an area smaller than an area of the first insulating barrier layer in a plan view, a resistive metal pattern disposed on the etch-stop layer, a second insulating barrier layer disposed on the resistive metal pattern, a second insulating layer covering the first and second insulating barrier layers, a second wiring disposed in the second insulating layer, and a first conductive via disposed between the resistive metal pattern and the second wiring to penetrate through the second insulating barrier layer and the second insulating layer and electrically connect the resistive metal pattern and the second wiring.
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公开(公告)号：US09953924B2
公开(公告)日：2018-04-24
申请号：US15618811
申请日：2017-06-09
发明人： Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Nae-In Lee
IPC分类号： H01L23/528 , H01L21/768 , H01L21/321 , H01L23/522 , H01L21/02 , H01L23/532 , H01L21/288 , H01L21/306
CPC分类号： H01L23/5283 , H01L21/02178 , H01L21/02274 , H01L21/0228 , H01L21/288 , H01L21/306 , H01L21/3212 , H01L21/76802 , H01L21/7682 , H01L21/76826 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/7684 , H01L21/76843 , H01L21/76849 , H01L21/76871 , H01L21/76877 , H01L21/76885 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.
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公开(公告)号：US09911644B2
公开(公告)日：2018-03-06
申请号：US15359724
申请日：2016-11-23
发明人： Wookyung You , Jongmin Baek , Sanghoon Ahn , Sangho Rha , Naein Lee
IPC分类号： H01L21/768 , H01L21/02 , H01L21/311 , H01L23/522 , H01L23/532
CPC分类号： H01L21/7682 , H01L21/02126 , H01L21/02203 , H01L21/02208 , H01L21/02271 , H01L21/02274 , H01L21/02345 , H01L21/02348 , H01L21/311 , H01L21/31144 , H01L21/76834 , H01L21/76877 , H01L23/5222 , H01L23/53295 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure describes semiconductor devices and methods of fabricating the same. The method includes forming an interlayer insulating layer on a substrate and forming conductive patterns in the interlayer insulating layer. A pore density of an upper portion of the interlayer insulating layer is higher than that of a lower portion of the interlayer insulating layer, and a pore density of an intermediate portion of the interlayer insulating layer gradually increases toward the upper portion of the interlayer insulating layer. An air gap is provided between the conductive patterns.
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