公开(公告)号：US20190172544A1

公开(公告)日：2019-06-06

申请号：US15996485

申请日：2018-06-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG-BUM KIM ,  DEOK-WOO LEE ,  DONG-HUN KWAK

IPC: G11C16/34 ,  G11C11/56 ,  G11C16/30 ,  G11C16/10 ,  G11C16/14

CPC classification number: G11C16/3445 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/14 ,  G11C16/30 ,  G11C16/3427 ,  G11C2211/5648 ,  H01L27/1157 ,  H01L27/11582

Abstract: A non-volatile memory device includes multiple word lines, and a voltage generator. Some of the word lines correspond to a deterioration area. The voltage generator is configured to generate a program voltage provided to multiple memory cells through the word lines. Control logic implemented by the non-volatile memory device is configured to control a program operation and an erase operation on the word lines. The deterioration area includes word lines of a first group and word lines of a second group. The control logic is configured to control a program sequence so that each of the word lines of the second group is programmed after an adjacent word line of the first group is programmed, and to control a distribution so that a threshold voltage level corresponding to an erase state of each of the word lines of the first group is higher than a threshold voltage level corresponding to an erase state of each of the word lines of the second group.

公开(公告)号：US20210125676A1

公开(公告)日：2021-04-29

申请号：US17141408

申请日：2021-01-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG-BUM KIM ,  MIN-SU KIM ,  DEOK-WOO LEE

IPC: G11C16/34 ,  G11C16/12 ,  G11C16/24 ,  G11C16/08

Abstract: A memory device includes: a memory cell array; a control logic circuit; and a row decoder. The row decoder is configured to activate string selection lines based on control of the control logic circuit. A program interval is formed between a first program operation and a second program operation. The control logic circuit includes a reprogram controller configured to control the row decoder so that a program interval differs in the memory cells connected to different string selection lines among the memory cells connected to a first wordline.

公开(公告)号：US20200350020A1

公开(公告)日：2020-11-05

申请号：US16935598

申请日：2020-07-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG-BUM KIM ,  MIN-SU KIM ,  DEOK-WOO LEE

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/08 ,  G11C16/34 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582

Abstract: A memory device includes: a memory cell region; a peripheral circuit region; a memory cell array; a control logic circuit; and a row decoder. The row decoder is configured to activate string selection lines based on control of the control logic circuit. A program interval is formed between a first program operation and a second program operation. The control logic circuit includes a reprogram controller configured to control the row decoder so that a program interval differs in the memory cells connected to different string selection lines among the memory cells connected to a first wordline.

公开(公告)号：US20190304554A1

公开(公告)日：2019-10-03

申请号：US16299684

申请日：2019-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG-BUM KIM ,  MIN-SU KIM ,  DEOK-WOO LEE

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/24 ,  G11C16/12

Abstract: A memory device includes: a memory cell array; a control logic circuit; and a row decoder. The row decoder is configured to activate string selection lines based on control of the control logic circuit. A program interval is formed between a first program operation and a second program operation. The control logic circuit includes a reprogram controller configured to control the row decoder so that a program interval differs in the memory cells connected to different string selection lines among the memory cells connected to a first wordline.