SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME

    公开(公告)号:US20220231172A1

    公开(公告)日:2022-07-21

    申请号:US17398494

    申请日:2021-08-10

    Abstract: A semiconductor device includes, on a substrate, a channel pattern including semiconductor patterns, which are spaced apart from each other in a first direction perpendicular to a top surface of the substrate, a gate electrode on the channel pattern, the gate electrode disposed on an uppermost semiconductor pattern of the semiconductor patterns and extended into regions between the semiconductor patterns, and a pair of gate spacers disposed on the uppermost semiconductor pattern to cover opposite side surfaces of the gate electrode, respectively. Each semiconductor pattern includes germanium. Each semiconductor pattern includes a pair of first portions vertically overlapped with the pair of gate spacers and a second portion between the pair of first portions. A thickness, in the first direction, of a pair of first portions of the uppermost semiconductor pattern is larger than a thickness, in the first direction, of the second portion of the uppermost semiconductor pattern.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20220037502A1

    公开(公告)日:2022-02-03

    申请号:US17451691

    申请日:2021-10-21

    Abstract: A semiconductor device include a substrate including a peripheral region, a first active pattern provided on the peripheral region of the substrate, the first active pattern having an upper portion including first semiconductor patterns and second semiconductor patterns which are alternately stacked, a first gate electrode intersecting the first active pattern, a pair of first source/drain patterns provided at both sides of the first gate electrode, respectively, and a first gate insulating layer disposed between the first gate electrode and the first active pattern. The first gate insulating layer includes a first insulating layer formed on the first active pattern, a second insulating layer formed on the first insulating layer, and a high-k dielectric layer formed on the second insulating layer. The first gate insulating layer contains a first dipole element including lanthanum (La), aluminum (Al), or a combination thereof.

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