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    SYSTEM ON CHIP AND DATA PROCESSING SYSTEM INCLUDING THE SAME
    2.
    发明申请
    SYSTEM ON CHIP AND DATA PROCESSING SYSTEM INCLUDING THE SAME 审中-公开
    包括其中的芯片和数据处理系统系统

    公开(公告)号：US20150319439A1

    公开(公告)日：2015-11-05

    申请号：US14645542

    申请日：2015-03-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyuk Jae Jang ,  Nyeong Kyu Kwon

    IPC: H04N19/126 ,  H04N19/105 ,  H04N19/13 ,  H04N19/146 ,  H04N19/176 ,  H04N19/184 ,  H04N19/11 ,  H04N19/117

    CPC classification number: H04N19/117 ,  H04N19/105 ,  H04N19/107 ,  H04N19/11 ,  H04N19/124 ,  H04N19/126 ,  H04N19/13 ,  H04N19/132 ,  H04N19/146 ,  H04N19/147 ,  H04N19/172 ,  H04N19/176 ,  H04N19/184

    Abstract: IN a system on chip (SoC) for adaptively adjusting a bit rate, the SoC includes a central processing unit (CPU) configured to compare a first reference bit rate with a bit rate of a previous frame and to output a first parameter, a spatial filter configured to adjust a cutoff frequency using the first parameter, to filter high-frequency components from a current frame using an adjusted cutoff frequency and to output a filtered current frame, and a video codec configured to adjust a bit rate of a current macroblock in the filtered current frame using a second parameter generated according to a result of comparing a second reference bit rate with a bit rate of a previous macroblock in the filtered current frame.

    Abstract translation: 在用于自适应地调整比特率的片上系统（SoC）中，SoC包括被配置为将第一参考比特率与先前帧的比特率进行比较并输出第一参数的中央处理单元（CPU），空间 滤波器，其被配置为使用第一参数来调整截止频率，以使用调整的截止频率来从当前帧中滤除高频分量，并输出滤波后的当前帧;以及视频编解码器，被配置为调整当前宏块的比特率 使用根据将第二参考比特率与滤波的当前帧中的先前宏块的比特率进行比较而生成的第二参数的滤波后的当前帧。

    Image processing devices having enhanced frame buffer compressors therein
    3.
    发明授权
    Image processing devices having enhanced frame buffer compressors therein 有权

    公开(公告)号：US10887616B2

    公开(公告)日：2021-01-05

    申请号：US16521147

    申请日：2019-07-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung Ho Jun ,  Sung Ho Roh ,  Hyuk Jae Jang

    IPC: H04N5/92 ,  H04N19/46 ,  H04N19/13 ,  H04N19/50 ,  H04N19/70 ,  H04N19/103 ,  H04N19/146 ,  H04N19/124 ,  H04N5/917

    Abstract: An image processing device includes a frame buffer compressor, which is configured to: (i) compress source data into compressed data having CRC bits appended thereto, and (ii) decompress the compressed data into output data and use the CRC bits to check for errors in the output data. A multimedia device is provided, which is configured to generate the source data in response to raw data. A memory device is provided, which is configured to store the compressed data. The frame buffer compressor may include an encoder configured to compress the source data into the compressed data with the CRC bits appended thereto, and a decoder configured to decompress the compressed data into the output data. The encoder may include a prediction module, which is configured to generate prediction data including reference data and residual data, from the source data.

    Decoder, decoding system including the decoder and method of operating the decoder
    5.
    发明授权
    Decoder, decoding system including the decoder and method of operating the decoder 有权

    公开(公告)号：US10271059B2

    公开(公告)日：2019-04-23

    申请号：US14942251

    申请日：2015-11-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Young Il Seo ,  Hyuk Jae Jang

    IPC: H04N19/44 ,  H04N19/423 ,  H04N19/43

    Abstract: A decoder includes a parser, an intra predictor, and an inter predictor. The parser parses a bit stream to extract header information and first through third data information, to determine a prediction mode for blocks in a current frame based on the header information, and to selectively output the first and second data information based on the prediction mode. The intra predictor generates a predicted value of a pixel of a current block based on a pixel value of a first reference block in the current frame based on the first data information. The inter predictor predicts a second reference block from a reference frame based on the second data information, converts a pixel value of the second reference block, and generates a predicted value of the pixel of the current block based on a converted pixel value.

    IMAGE PROCESSING DEVICES HAVING ENHANCED FRAME BUFFER COMPRESSORS THEREIN
    9.
    发明申请
    IMAGE PROCESSING DEVICES HAVING ENHANCED FRAME BUFFER COMPRESSORS THEREIN 审中-公开

    公开(公告)号：US20200177902A1

    公开(公告)日：2020-06-04

    申请号：US16521147

    申请日：2019-07-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung Ho Jun ,  Sung Ho Roh ,  Hyuk Jae Jang

    IPC: H04N19/46 ,  H04N19/13 ,  H04N19/50 ,  H04N19/124 ,  H04N19/103 ,  H04N19/146 ,  H04N19/70

    Abstract: An image processing device includes a frame buffer compressor, which is configured to: (i) compress source data into compressed data having CRC bits appended thereto, and (ii) decompress the compressed data into output data and use the CRC bits to check for errors in the output data. A multimedia device is provided, which is configured to generate the source data in response to raw data. A memory device is provided, which is configured to store the compressed data. The frame buffer compressor may include an encoder configured to compress the source data into the compressed data with the CRC bits appended thereto, and a decoder configured to decompress the compressed data into the output data. The encoder may include a prediction module, which is configured to generate prediction data including reference data and residual data, from the source data.

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