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公开(公告)号:US20190004869A1
公开(公告)日:2019-01-03
申请号:US15855840
申请日:2017-12-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YOUNGSIK KIM , JINWOO KIM , HEE HYUN NAM , KYUNGBO YANG , JI-SEUNG YOUN , YOUNGGEUN LEE
Abstract: A storage device includes a nonvolatile memory and a controller. The controller includes a job manager circuit and a processor. The job manager circuit manages a first-type job associated with the nonvolatile memory, and the processor processes a second-type job associated with the nonvolatile memory. The job manager circuit manages the first-type job without intervention of the processor. The processor provides a management command to the job manager circuit in response to a notification received from the job manager circuit, such that the second-type job is processed.
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公开(公告)号:US20190004949A1
公开(公告)日:2019-01-03
申请号:US15871283
申请日:2018-01-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JINWOO KIM , KUI-YON MUN , CHUL LEE
IPC: G06F12/084 , G06F3/06 , G06F13/16
Abstract: A system includes: a nonvolatile memory; a memory controller configured to control the nonvolatile memory, the memory controller including a first buffer memory for temporarily storing write data to be written to the nonvolatile memory; and a second buffer memory having a lower operational speed and a higher memory capacity than the first buffer memory. The memory controller is configured to transmit the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory, and to release an operational state of the first buffer memory after transmitting the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory. Writing additional write data to the first buffer memory is prohibited prior to the release of the operational state of the first buffer memory, and is permitted after the release of the operational state of the first buffer memory.
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公开(公告)号:US20190004736A1
公开(公告)日:2019-01-03
申请号:US15860498
申请日:2018-01-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YOUNGGEUN LEE , JINWOO KIM , YOUNGSIK KIM , HWAN-CHUNG KIM , JEONGHOON CHO
IPC: G06F3/06
Abstract: A storage device includes nonvolatile memories and a controller. The controller previously manages a correspondence relationship between physical addresses indicating the memory regions and stream identifiers, before first write data is received by the controller. The controller controls the nonvolatile memories such that the first write data is stored in a first memory region of a physical address which is managed corresponding to a first stream identifier of the first write data in the correspondence relationship. The first write data is transferred to the nonvolatile memories based on the correspondence relationship, regardless of whether second write data having a second stream identifier is received by the controller.
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公开(公告)号:US20210240393A1
公开(公告)日:2021-08-05
申请号:US17129185
申请日:2020-12-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: MYUNG HYUN JO , YOUNGWOOK KIM , JINWOO KIM , JAEYONG JEONG
Abstract: An operation method of a storage device including first and second physical functions respectively corresponding to first and second hosts includes receiving performance information from each of the first and second hosts, setting a first weight value corresponding to the first physical function and a second weight value corresponding to the second physical function, based on the received performance information, selecting one of a first submission queue, a second submission queue, a third submission queue, and a fourth submission queue based on an aggregated value table, the first and second submission queues being managed by the first host and the third and fourth submission queues are managed by the second host, processing a command from the selected submission queue, and updating the aggregated value table based on a weight value corresponding to the processed command from among the first and second weights and input/output (I/O) information of the processed command.
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公开(公告)号:US20210043123A1
公开(公告)日:2021-02-11
申请号:US16811881
申请日:2020-03-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SUNG-HO LEE , JINWOO KIM , YONGJOO SONG
IPC: G09G3/20
Abstract: A display driving circuit includes a gamma generator configured to output, to nodes, gamma voltages having different voltage levels, and a selector configured to select one of the nodes to which the gamma voltages are output, and output a voltage of the selected one of the nodes. The display driving circuit further includes a voltage regulator configured to selectively input a first current to the selected one of the nodes and output a second current from the selected one of the nodes, based on the voltage of the selected one of the nodes, to adjust a voltage level of the voltage of the selected one of the nodes to a voltage level of a respective one of the gamma voltages that is output to the selected one of the nodes.
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公开(公告)号:US20220326890A1
公开(公告)日:2022-10-13
申请号:US17852652
申请日:2022-06-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: MYUNG HYUN JO , YOUNGWOOK KIM , JINWOO KIM , JAEYONG JEONG
Abstract: An operation method of a storage device including first and second physical functions respectively corresponding to first and second hosts includes receiving performance information from each of the first and second hosts, setting a first weight value corresponding to the first physical function and a second weight value corresponding to the second physical function, based on the received performance information, selecting one of a first submission queue, a second submission queue, a third submission queue, and a fourth submission queue based on an aggregated value table, the first and second submission queues being managed by the first host and the third and fourth submission queues are managed by the second host, processing a command from the selected submission queue, and updating the aggregated value table based on a weight value corresponding to the processed command from among the first and second weights and input/output (I/O) information of the processed command.
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公开(公告)号:US20160358657A1
公开(公告)日:2016-12-08
申请号:US15083834
申请日:2016-03-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JINWOO KIM , SEONG YEON KIM , JAEGEUN PARK , HYO-DEOK SHIN , YOUNGGEUN LEE , YOUNGJIN CHO
IPC: G11C16/10
CPC classification number: G11C16/10 , G11C7/1063
Abstract: A nonvolatile memory system includes first and second nonvolatile memory devices and a memory controller configured to control the first and second nonvolatile memory devices through one channel. During a program operation, the memory controller transmits first signals, for setting first page data up in the first nonvolatile memory device, to the first nonvolatile memory device through the channel. While the first nonvolatile memory device sets up the first page data in response to the first signals, the memory controller transmits second signals, for setting second page data up in the second nonvolatile memory device, to the second nonvolatile memory device.
Abstract translation: 非易失性存储器系统包括第一和第二非易失性存储器件以及被配置为通过一个通道来控制第一和第二非易失性存储器件的存储器控制器。 在程序操作期间,存储器控制器通过通道向第一非易失性存储器件发送用于将第一非易失性存储器件中的第一页数据向上设置的第一信号。 当第一非易失性存储装置响应于第一信号设置第一页数据时,存储器控制器将用于将第二页数据向上设置在第二非易失存储装置中的第二信号发送到第二非易失存储装置。
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公开(公告)号:US20230169240A1
公开(公告)日:2023-06-01
申请号:US17994089
申请日:2022-11-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JINWOO KIM , BYOUNGSEON CHOI , YUNJUN NAM , SANGHOON MYUNG , JAESIK AN , JISU RYU , CHANGWOOK JEONG , JAEMYUNG CHOE
IPC: G06F30/27
CPC classification number: G06F30/27
Abstract: A method of generating optimal input data for a design simulator providing output data related to output parameters in response to input data related to input parameters. The method includes; generating training data including sample input data and sample output data, selecting at least one essential input parameter affecting a plurality of output parameters from among the input parameters in accordance with an estimation model trained using the training data, and generating the optimal input data in accordance with essential input data corresponding to the at least one essential input parameter and the sample output data.
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公开(公告)号:US20200183619A1
公开(公告)日:2020-06-11
申请号:US16789526
申请日:2020-02-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JINWOO KIM , JAEGEUN PARK , YOUNGJIN CHO
IPC: G06F3/06 , G06F12/0868 , G06F11/10 , G06F13/28 , G06F12/0831
Abstract: A read method executed by a computing system includes a processor, at least one nonvolatile memory, and at least one cache memory performing a cache function of the at least one nonvolatile memory. The method includes receiving a read request regarding a critical word from the processor. A determination is made whether a cache miss is generated, through a tag determination operation corresponding to the read request. Page data corresponding to the read request is received from the at least one nonvolatile memory in a wraparound scheme when a result of the tag determination operation indicates that the cache miss is generated. The critical word is output to the processor when the critical word of the page data is received.
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