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公开(公告)号:US20240178168A1
公开(公告)日:2024-05-30
申请号:US18237962
申请日:2023-08-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaeho KIM , Woosung YANG , Joonyoung KWON , Jiyoung KIM , Sukkang SUNG
CPC classification number: H01L24/08 , H10B41/50 , H10B43/50 , H01L2224/08145
Abstract: A semiconductor device includes a first substrate structure including a substrate, circuit elements on the substrate, a first interconnection structure on the circuit elements, and first metal bonding layers on the first interconnection structure; and a second substrate structure connected to the first substrate structure, and the second substrate structure includes: a plating layer; gate electrodes stacked and spaced apart from each other in a first direction below the plating layer; channel structures penetrating through the gate electrodes and extending in the first direction; a separation region penetrating through the gate electrodes and extending in a second direction; a second interconnection structure below the gate electrodes and the channel structures; second metal bonding layers below the second interconnection structure and connected to the first metal bonding layers; and dummy pattern layers between the second metal bonding layers, extending in the second direction, and including an insulating material.
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公开(公告)号:US20240038660A1
公开(公告)日:2024-02-01
申请号:US18197283
申请日:2023-05-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ahreum LEE , Woosung YANG , Jimo GU , Jaeho KIM , Sukkang SUNG
IPC: H01L23/528 , G11C16/04 , H01L23/522 , H10B41/10 , H10B41/35 , H10B41/27 , H10B41/40 , H10B43/10 , H10B43/27 , H10B43/35 , H10B43/40 , H10B80/00 , H01L25/065
CPC classification number: H01L23/5283 , G11C16/0483 , H01L23/5226 , H10B41/10 , H10B41/35 , H10B41/27 , H10B41/40 , H10B43/10 , H10B43/27 , H10B43/35 , H10B43/40 , H10B80/00 , H01L25/0652
Abstract: A semiconductor device includes a substrate including a memory cell region and a connection region. A memory stack includes a plurality of word lines extending in the memory cell region and the connection region in a horizontal direction that is parallel with an upper surface of the substrate. The plurality of word lines overlaps with each other in a vertical direction. A support is in the connection region and positioned at a side of the memory stack. The support includes a plurality of steps. A plurality of pad parts is on a top surface of the support. A plurality of contact plugs passes through at least some of the plurality of word lines in the vertical direction. The plurality of contact plugs directly contacts the plurality of pad parts for electrical connection therewith.
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公开(公告)号:US20230012115A1
公开(公告)日:2023-01-12
申请号:US17570874
申请日:2022-01-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaeho KIM , Jiwon KIM , Joonsung KIM , Sukkang SUNG , Sangdon LEE , Jong-Min LEE , Euntaek JUNG
IPC: H01L27/11582 , H01L27/11556 , H01L27/11529 , H01L27/11573
Abstract: A three-dimensional semiconductor devices including a substrate, a stack structure including gate electrodes on the substrate and string selection electrodes spaced apart from each other on the gate electrodes, a first separation structure running in a first direction across the stack structure and being between the string selection electrodes, vertical channel structures penetrating the stack structure, and bit lines connected to the vertical channel structures and extending in a second direction may be provided. A first subset of the vertical channel structures is connected in common to one of the bit lines. The vertical channel structures of the first subset may be adjacent to each other in the second direction across the first separation structure. Each of the string selection electrodes may surround each of the vertical channel structures of the first subset.
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4.
公开(公告)号:US20200265337A1
公开(公告)日:2020-08-20
申请号:US16791111
申请日:2020-02-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sripurna MUTALIK , Nidhal Kottamoola IBRAHIMKUTTY , Naresh Kumar NARASIMMA MOORTHY , Manith SHETTY , Anuradha KANUKOTLA , Jaeho KIM , Kwanjin JUNG , Wonseo CHOI
IPC: G06N20/00 , G06F11/34 , G06F16/908 , G06F3/0482
Abstract: A method for machine learning based prediction of at least one subsequent UI layout is provided. The method may include detecting, by the electronic device, a first transition event. Further, the method may include identifying, by the electronic device, a UI layout associated with a first application of the electronic device. Further, the method may include predicting, by the electronic device, the at least one subsequent UI layout to be displayed based on at least one transition parameter, wherein the at least one subsequent UI layout is associated with at least one of the first application or at least one second application. Further, the method may include loading, by the electronic device, the at least one subsequent UI layout in a memory of the electronic device.
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公开(公告)号:US20240234216A9
公开(公告)日:2024-07-11
申请号:US18202650
申请日:2023-05-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Inkeun BAEK , Suhwan PARK , Ikseon JEON , Namil KOO , Ingi KIM , Jaeho KIM , Junbum PARK , Sunhong JUN
CPC classification number: H01L22/12 , G01N21/9501
Abstract: Provided is a method of extracting properties of a layer on a wafer, the method including emitting electromagnetic waves to a lower surface of the wafer, detecting a first electromagnetic wave, that passes through a target layer on an upper surface of the wafer, and a second electromagnetic wave, that is reflected from the target layer, among the electromagnetic waves to obtain data including information about the first electromagnetic wave and the second electromagnetic wave, and separating a first pulse of the first electromagnetic wave and a second pulse of the second electromagnetic wave from each other in the data and obtaining property data of the target layer.
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6.
公开(公告)号:US20230045617A1
公开(公告)日:2023-02-09
申请号:US17880234
申请日:2022-08-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Naresh Kumar NARASIMMA MOORTHY , Dwait BHATT , Anuradha KANUKOTLA , Sripurna MUTALIK , Prateek BANSAL , Jaeho KIM , Syama SUDHEESH , Renju Chirakarotu NAIR
Abstract: A method for managing a boost time required for an application launch in an electronic device is provided. The method includes detecting, by the electronic device, a user input to launch the application. Further, the method includes measuring, by the electronic device, real-time system health parameters of the electronic device. Further, the method includes predicting, by the electronic device, an application launch time by inputting the real-time system health parameters to an AI-based application prediction model. Further, the method includes boosting, by the electronic device, at least one hardware of the electronic device based on the predicted application launch time.
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公开(公告)号:US20230040041A1
公开(公告)日:2023-02-09
申请号:US17880527
申请日:2022-08-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Suho JIN , Dongju LEE , Hyeok KWON , Jaeho KIM , Jongyeon KIM , Cheolwoo PARK
Abstract: An electronic device may include: at least one communication processor, an RFIC, at least one power amplifier , and at least one converter and wherein the at least one communication processor is configured to: set a driving voltage, to be applied to a first power amplifier for amplifying a first RF signal provided from the RFIC among the at least one power amplifier, to be a first voltage, based on an APT mode, control at least part of the at least one converter to provide a first voltage, set based on the APT mode, to the first power amplifier during a transmission period of the first RF signal, and control at least part of the at least one converter to provide the first voltage to the first power amplifier during at least partial period of a remaining period in which no RF signal is transmitted, based on the occurrence of an event associated with audible noise.
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公开(公告)号:US20210248010A1
公开(公告)日:2021-08-12
申请号:US17106491
申请日:2020-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinshik BAE , Hongcheol SIM , Kiljae KIM , Jaeho KIM , Hyunchul SEOK , Youngcheol SIN , Wonseo CHOI
Abstract: An electronic device and a method of operating an electronic device are provided. The electronic device includes a memory, a display, and a processor including a plurality of cores generating a plurality of frames including a first frame and a second frame, wherein the processor is configured to identify a first time spent for generating the first frame to be displayed on the display and a second time corresponding to a frame rate of the display, determine whether to perform an operation of controlling the plurality of cores for reducing a time for generating the second frame, based on a result of comparison between the first time and the second time, determine a size of a load for processing a thread related to generation of the second frame, based on a ratio between the first time and the second time, in response to the determination to perform the operation of controlling the cores, allocate at least one of the plurality of cores as cores to process the thread, based on the determined size of the load, determine an operation frequency of the cores, based on the determined size of the load, and control the cores to generate the second frame according to the determined operation frequency.
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公开(公告)号:US20190108066A1
公开(公告)日:2019-04-11
申请号:US16086301
申请日:2017-02-21
Applicant: Samsung Electronics Co., Ltd
Inventor: Kiljae KIM , Jaeho KIM , Daehyun CHO
Abstract: Various embodiments provide an electronic device and a method, the electronic device comprising: a memory; a first processor; a second processor which has attributes different from those of the first processor; and a control unit, wherein the control unit is configured to identify a task loaded into the memory, select which of the first processor and the second processor is to execute the task, on the basis of attribute information corresponding to a user interaction associated with the task, and allocate the task to the selected processor. Other embodiments are also possible.
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公开(公告)号:US20230309023A1
公开(公告)日:2023-09-28
申请号:US18121221
申请日:2023-03-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongju LEE , Suho JIN , Jaeho KIM
CPC classification number: H04W52/241 , H04W52/32 , H04W52/367
Abstract: An electronic device may include at least one communication processor, an RFIC, at least one power amplifier, and at least one converter, the at least one communication processor is configured to identify at least one first driving voltage corresponding to at least one first transmission power of at least one first RF signal, control a first converter corresponding to a first power amplifier among the at least one converter, so that the at least one first driving voltage is applied to the first power amplifier corresponding to the at least one first RF signal among the at least one power amplifier, identify at least one second driving voltage corresponding to the at least one first transmission power of the at least one first RF signal, control the first converter so that the at least one second driving voltage is applied to the first power amplifier.
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