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公开(公告)号：US12029027B2
公开(公告)日：2024-07-02
申请号：US18205715
申请日：2023-06-05
发明人： Cheoljin Cho , Jaesoon Lim , Jaehyoung Choi , Jungmin Park
摘要： A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.
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公开(公告)号：US20230217647A1
公开(公告)日：2023-07-06
申请号：US17952386
申请日：2022-09-26
发明人： Hongsik CHAE , Taekyun Kim , Jin-Su Lee , Hyo-Sun Min , Hyungsuk Jung , Jaehyoung Choi , Donguk Han
IPC分类号： H01L27/108 , H01L49/02
CPC分类号： H01L27/10814 , H01L28/90
摘要： A semiconductor device includes bottom electrodes on a substrate. A supporting pattern is disposed between the bottom electrodes in a plan view. A top electrode covers the bottom electrodes and the supporting pattern. A dielectric layer is disposed between the bottom electrodes and the top electrode and between the supporting pattern and the top electrode. A capping pattern is interposed between the bottom electrodes and the dielectric layer and between the supporting pattern and the dielectric layer. The capping pattern covers at least a portion of a side surface of the supporting pattern and extends to cover a top surface of the supporting pattern and top surfaces of the bottom electrodes.
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公开(公告)号：US11678476B2
公开(公告)日：2023-06-13
申请号：US17222006
申请日：2021-04-05
发明人： Cheoljin Cho , Jaesoon Lim , Jaehyoung Choi , Jungmin Park
IPC分类号： H10B12/00 , H01L27/108 , H01L49/02
CPC分类号： H01L27/10805 , H01L28/55 , H01L28/65
摘要： A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.
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公开(公告)号：US10090377B2
公开(公告)日：2018-10-02
申请号：US15424951
申请日：2017-02-06
发明人： Jaewan Chang , Younsoo Kim , Sunmin Moon , Jaehyoung Choi
IPC分类号： H01L49/02
摘要： A semiconductor device comprises a capacitor that includes a first electrode, a second electrode, and a dielectric layer between the first electrode and the second electrode. The dielectric layer comprises a first high-k dielectric layer between the first electrode and the second electrode, a first silicon oxide layer between the first high-k dielectric layer and the second electrode, and a first aluminum oxide layer between the first high-k dielectric layer and the second electrode.
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公开(公告)号：US20220084943A1
公开(公告)日：2022-03-17
申请号：US17235369
申请日：2021-04-20
发明人： Cheoljin Cho , Jungmin Park , Hanjin Lim , Jaehyoung Choi
IPC分类号： H01L23/528 , H01L23/532 , H01L21/768
摘要： A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode including an outer protective layer, a conductive layer between opposing sidewalls of the outer protective layer, and an inner protective layer between opposing sidewalls of the conductive layer, a first supporter pattern on a side surface of the lower electrode, the first supporter pattern including a supporter hole, a dielectric layer on a surface of each of the lower electrode and the first supporter pattern, and an upper electrode on the dielectric layer. The outer protective layer includes titanium oxide, the conductive layer includes titanium nitride, and the inner protective layer includes titanium silicon nitride. In a horizontal cross-sectional view, the outer protective layer has an arc shape that extends between the dielectric layer and the conductive layer.
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公开(公告)号：US09847278B2
公开(公告)日：2017-12-19
申请号：US15095327
申请日：2016-04-11
发明人： Kyung-Eun Kim , Yongkwan Kim , Semyeong Jang , Jaehyoung Choi , Yoosang Hwang , Bong-Soo Kim
IPC分类号： H01L21/70 , H01L21/76 , H01L23/482 , H01L29/06 , H01L21/762 , H01L21/768 , H01L27/108 , H01L23/522 , H01L23/532
CPC分类号： H01L23/4821 , H01L21/76264 , H01L21/7682 , H01L21/76897 , H01L23/5222 , H01L23/53295 , H01L27/10814 , H01L27/10855 , H01L27/10885 , H01L29/0649
摘要： A semiconductor device includes first and second bit line structures on a substrate and spaced apart from each other, a via plug partially filling between the first and second bit line structures, a via pad in contact with an upper surface of the via plug and an upper sidewall of the first bit line structure, the via pad being spaced apart from an upper portion of the second bit line structure, a first cavity filled with air being between the via plug and the first bit line structure and a second cavity filled with air between the via plug and the second bit line structure, A gap capping spacer having a first portion on the upper sidewall of the first bit line structure and a second portion covers the first air spacer. A horizontal width of the first portion is smaller than that of the second portion.
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公开(公告)号：US11990503B2
公开(公告)日：2024-05-21
申请号：US17376458
申请日：2021-07-15
发明人： Gabjin Nam , Youngbin Lee , Cheoljin Cho , Jaehyoung Choi
摘要： Provided is a method of fabricating a capacitor. The method of fabricating a capacitor may include forming a first electrode, forming a dielectric layer on the first electrode, forming a second electrode on the dielectric layer, and applying, between the first electrode and the second electrode, a voltage outside an operating voltage range applied during operation or a current outside an operating current range applied during operation.
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公开(公告)号：US11901291B2
公开(公告)日：2024-02-13
申请号：US17235369
申请日：2021-04-20
发明人： Cheoljin Cho , Jungmin Park , Hanjin Lim , Jaehyoung Choi
IPC分类号： H01L23/528 , H01L49/02
CPC分类号： H01L23/5283 , H01L28/60 , H01L28/75 , H01L28/90
摘要： A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode including an outer protective layer, a conductive layer between opposing sidewalls of the outer protective layer, and an inner protective layer between opposing sidewalls of the conductive layer, a first supporter pattern on a side surface of the lower electrode, the first supporter pattern including a supporter hole, a dielectric layer on a surface of each of the lower electrode and the first supporter pattern, and an upper electrode on the dielectric layer. The outer protective layer includes titanium oxide, the conductive layer includes titanium nitride, and the inner protective layer includes titanium silicon nitride. In a horizontal cross-sectional view, the outer protective layer has an arc shape that extends between the dielectric layer and the conductive layer.
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公开(公告)号：US10121793B2
公开(公告)日：2018-11-06
申请号：US15083819
申请日：2016-03-29
发明人： Kyung-Eun Kim , Yongkwan Kim , Semyeong Jang , Jaehyoung Choi , Yoosang Hwang , Bong-Soo Kim
IPC分类号： H01L27/108
摘要： A semiconductor device includes storage electrodes on a substrate and one or more supporters configured to couple one or more portions of the storage electrodes. The semiconductor device may include multiple non-intersecting supporters extending in parallel to a surface of the substrate. At least one supporter may have an upper surface that is substantially coplanar with upper surfaces of the storage electrodes. The storage electrodes may include a capacitor dielectric layer that conformally covers one or more surfaces of the storage electrodes and one or more supporters. A storage electrode may include upper and lower storage electrodes coupled together. The upper and lower storage electrodes may have different horizontal widths.
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