公开(公告)号：US10153214B2

公开(公告)日：2018-12-11

申请号：US15386843

申请日：2016-12-21

申请人： Samsung Electronics Co., Ltd.

发明人： Se Jung Park ,  Ju-Hyun Kim ,  Hoyoung Kim ,  Boun Yoon ,  TaeYong Kwon ,  Sangkyun Kim ,  Sanghyun Park

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/84 ,  H01L21/3105 ,  H01L21/306 ,  H01L27/092

摘要： A patterning method for fabricating a semiconductor device includes forming, for example sequentially forming, a lower buffer layer, a first channel semiconductor layer, and a capping insulating layer on a substrate, forming an opening to penetrate the capping insulating layer and the first channel semiconductor layer and expose a portion of the lower buffer layer, forming a second channel semiconductor layer to fill the opening and include a first portion protruding above the capping insulating layer, performing a first CMP process to remove at least a portion of the first portion, removing the capping insulating layer, and performing a second CMP process to remove at least a portion of a second portion of the second channel semiconductor layer protruding above the first channel semiconductor layer.

公开(公告)号：US09899594B2

公开(公告)日：2018-02-20

申请号：US15169775

申请日：2016-06-01

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Ki-Woong Kim ,  Ju-Hyun Kim ,  Yong-Sung Park ,  Se-Chung Oh ,  Joon-Myoung Lee

IPC分类号： H01L29/94 ,  H01L43/10 ,  H01L43/08 ,  H01L27/22 ,  H01L43/12

CPC分类号： H01L43/10 ,  H01L27/224 ,  H01L27/228 ,  H01L43/08 ,  H01L43/12

摘要： A magnetic memory device includes a substrate, a circuit device on the substrate, a lower electrode electrically connected to the circuit device, a magnetic tunnel junction structure (MTJ structure) on the lower electrode, and an upper electrode on the MTJ structure. The MTJ structure includes a pinned layer structure including at least one crystalline ferromagnetic layer and at least one amorphous ferromagnetic layer, a free layer, and a tunnel barrier layer between the pinned layer structure and the free layer.

公开(公告)号：US10672978B2

公开(公告)日：2020-06-02

申请号：US16122056

申请日：2018-09-05

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jung-Min Lee ,  Ju-Hyun Kim ,  Jung-Hwan Park ,  Se-Chung Oh ,  Dong-Kyu Lee ,  Kyung-Il Hong

IPC分类号： H01L43/12 ,  H01L43/08 ,  H01L43/10 ,  H01L27/22 ,  H01L45/00 ,  H01L43/02 ,  H01L27/24 ,  H01L29/66

摘要： In a method of manufacturing a variable resistance memory device, an MTJ structure layer is formed on a substrate. The MTJ structure layer is etched in an etching chamber to form an MTJ structure. The substrate having the MTJ structure thereon is transferred to a deposition chamber through a transfer chamber. A protection layer covering a sidewall of the MTJ structure is formed in the deposition chamber. The etching chamber, the transfer chamber, and the deposition chamber are kept in a high vacuum state equal to or more than about 10−8 Torr.

公开(公告)号：US10062786B2

公开(公告)日：2018-08-28

申请号：US15168694

申请日：2016-05-31

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-Hyun Kim ,  Ho-Young Kim ,  Se-Jung Park ,  Bo-Un Yoon

IPC分类号： H01L27/088 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762

CPC分类号： H01L29/7856 ,  H01L21/76229 ,  H01L21/76232 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66795 ,  H01L29/7853 ,  H01L29/7854

摘要： A semiconductor device includes a first fin-type pattern on a substrate, having a first sidewall and a second sidewall opposed to each other; a first trench formed in contact with the first sidewall; a second trench formed in contact with the second sidewall; a first field insulating layer partially filling the first trench; and a second field insulating layer partially filling the second trench and a second field insulating layer partially filling the second trench. The second field insulating layer includes a first region and a second region disposed in a sequential order starting from the second sidewall, an upper surface of the second region being higher than an upper surface of the first field insulating layer. The device further includes a gate electrode on the first fin-type pattern, the first field insulating layer and the second field insulating layer, the gate electrode intersecting the first fin-type pattern and overlapping the second region.

公开(公告)号：US20160365453A1

公开(公告)日：2016-12-15

申请号：US15168694

申请日：2016-05-31

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-Hyun Kim ,  Ho-Young KIM ,  Se-Jung PARK ,  Bo-Un Yoon

IPC分类号： H01L29/78 ,  H01L21/762 ,  H01L29/66 ,  H01L29/423 ,  H01L27/088

CPC分类号： H01L29/7856 ,  H01L21/76229 ,  H01L21/76232 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66795 ,  H01L29/7854

摘要： A semiconductor device includes a first fin-type pattern on a substrate, having a first sidewall and a second sidewall opposed to each other; a first trench formed in contact with the first sidewall; a second trench formed in contact with the second sidewall; a first field insulating layer partially filling the first trench; and a second field insulating layer partially filling the second trench and a second field insulating layer partially filling the second trench. The second field insulating layer includes a first region and a second region disposed in a sequential order starting from the second sidewall, an upper surface of the second region being higher than an upper surface of the first field insulating layer. The device further includes a gate electrode on the first fin-type pattern, the first field insulating layer and the second field insulating layer, the gate electrode intersecting the first fin-type pattern and overlapping the second region.

摘要翻译： 半导体器件包括在衬底上的第一鳍式图案，其具有彼此相对的第一侧壁和第二侧壁; 形成为与所述第一侧壁接触的第一沟槽; 形成为与第二侧壁接触的第二沟槽; 部分地填充所述第一沟槽的第一场绝缘层; 以及部分地填充所述第二沟槽的第二场绝缘层和部分地填充所述第二沟槽的第二场绝缘层。 第二场绝缘层包括从第二侧壁开始以顺序设置的第一区域和第二区域，第二区域的上表面高于第一场绝缘层的上表面。 该器件还包括在第一鳍型图案上的栅电极，第一场绝缘层和第二场绝缘层，栅电极与第一鳍型相交，并与第二区重叠。