公开(公告)号：US20230387207A1

公开(公告)日：2023-11-30

申请号：US18155532

申请日：2023-01-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juri LEE ,  Taegon KIM ,  Seungmo KANG ,  Sihyung LEE

IPC: H01L29/08 ,  H01L29/16 ,  H01L29/417 ,  H01L27/088 ,  H01L29/66 ,  H01L29/775 ,  H01L21/265

CPC classification number: H01L29/0847 ,  H01L29/16 ,  H01L29/41733 ,  H01L27/088 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775 ,  H01L21/26506 ,  H01L29/0673

Abstract: An integrated circuit (IC) device includes a fin-type active region extending long in a first lateral direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region, and a source/drain region adjacent to the gate line on the fin-type active region, the source/drain region. The source/drain region includes a lower source/drain region and an upper source/drain region. The lower source/drain region includes at least one silicon isotope selected from silicon isotopes of 28Si, 29Si, and 30Si, and the upper source/drain region includes a 28Si element at a content higher than a content of the 28Si element in the lower source/drain region.

公开(公告)号：US20240096953A1

公开(公告)日：2024-03-21

申请号：US18199115

申请日：2023-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juri LEE ,  Taegon KIM ,  Sun-Ryung OH ,  Sihyung LEE

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L27/0924 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: An integrated circuit (IC) device is provided. The IC device includes: a channel region on a substrate; a gate on the channel region; a first gate dielectric film including a first portion and a second portion, the first portion being in contact with the channel region between the channel region and the gate, and the second portion being apart from the channel region; and a second gate dielectric film including a third portion, the third portion being in contact with the second portion of the first gate dielectric film at a vertical level farther from the substrate than a top surface of the gate.

公开(公告)号：US20180083007A1

公开(公告)日：2018-03-22

申请号：US15613334

申请日：2017-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juri LEE ,  Yong-Suk TAK ,  Sung-Dae SUK ,  Seungmin SONG

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/092 ,  H01L29/0653 ,  H01L29/1037 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/78696

Abstract: Disclosed are semiconductor devices including a field effect transistor and methods of manufacturing the same. The semiconductor device comprises a device isolation layer in an upper portion of a substrate, first active patterns on a first region of the substrate and second active patterns on a second region of the substrate, gate structures extending in one direction and running across the first and second active patterns, and a blocking layer on a recessed region of the device isolation layer of the first region. Each of the first and second active patterns comprises a plurality of semiconductor patterns that are vertically stacked and spaced apart from each other. The semiconductor patterns of the first active patterns have conductivity different from that of the semiconductor patterns of the second active patterns. The blocking layer is limited on the first region.