摘要:
A method for manufacturing a semiconductor device may include forming contact pads spaced apart from each other in a first direction on a substrate and between first insulating patterns; forming first holes between the first insulating patterns and having bottom ends adjacent top surfaces of the contact pads; forming second holes between second insulating patterns and overlapping with partial portions of the first holes in a second direction perpendicular to the first direction; and forming a bottom electrode layer including first portions to cover the bottom ends of the first holes and sidewalls of the second holes. In forming the first and second holes, the first and second holes are formed simultaneously.
摘要:
Semiconductor devices including a capacitor and methods of forming the same are provided. The semiconductor devices may include a capacitor that include a lower electrode, an upper electrode on the lower electrode, and a dielectric layer extending between the lower electrode and the upper electrode. The lower electrode may include a doped region that contacts the dielectric layer, and the doped region of the lower electrode is configured to increase a capacitance of the capacitor.
摘要:
A capacitor includes a first electrode and a second electrode spaced apart from each other, a dielectric layer disposed between the first electrode and the second electrode, and a seed layer disposed between the first electrode and the dielectric layer. The dielectric layer includes a dielectric material having a tetragonal crystal structure. The seed layer includes a seed material that satisfies at least one of a lattice constant condition or a bond length condition.
摘要:
Carbon-containing patterns are formed on an etch target layer, side surfaces of the carbon-containing patterns are treated by a hydrophilic process, poly-crystalline silicon spacers are formed on the side surfaces of the carbon-containing patterns after the hydrophilic process has been performed, and the etch target layer is patterned using the poly-crystalline silicon spacers as an etch mask.