公开(公告)号：US09406383B2

公开(公告)日：2016-08-02

申请号：US14606284

申请日：2015-01-27

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Il-Han Park ,  Su-Yong Kim

IPC分类号： G11C7/10 ,  G11C16/08 ,  G11C11/56 ,  G11C16/12

CPC分类号： G11C16/08 ,  G11C11/5628 ,  G11C16/12

摘要： A non-volatile memory device includes a first word line, a second word line, first memory cells, second memory cells, and an address decoder. The second word line is adjacent to the first word line. The first memory cells are connected to the first word line. The second memory cells are connected to the second word line. The second memory cells are connected to the first memory cells, respectively. The address decoder applies a first voltage to the first word line and applies a second voltage to the second word line in an over program period of the first memory cells. The first voltage is higher than a program voltage of the first and second memory cells. The second voltage is lower than a pass voltage of the first and second memory cells.

摘要翻译： 非易失性存储器件包括第一字线，第二字线，第一存储器单元，第二存储器单元和地址解码器。 第二个字线与第一个字线相邻。 第一个存储单元连接到第一个字线。 第二存储单元连接到第二字线。 第二存储单元分别连接到第一存储单元。 地址解码器向第一字线施加第一电压，并在第一存储器单元的过程编程周期中向第二字线施加第二电压。 第一电压高于第一和第二存储器单元的编程电压。 第二电压低于第一和第二存储单元的通过电压。

公开(公告)号：US10854250B2

公开(公告)日：2020-12-01

申请号：US15997964

申请日：2018-06-05

申请人： Samsung Electronics Co., Ltd.

发明人： Jae-Yun Lee ,  Joon Soo Kwon ,  Byung Soo Kim ,  Su-Yong Kim ,  Sang-Soo Park ,  Il Han Park ,  Kang-Bin Lee ,  Jong-Hoon Lee ,  Na-Young Choi

IPC分类号： G11C8/08 ,  G11C29/12 ,  G11C16/30 ,  G11C16/08 ,  G11C16/34 ,  G11C16/10 ,  G11C16/04 ,  G06F3/06 ,  G11C5/14 ,  G11C16/12 ,  G11C16/14 ,  G11C29/02

摘要： A memory device comprises a memory cell array including a first memory cell disposed on a substrate and a second memory cell above the first memory cell; a first word line connected to the first memory cell and a second word line connected to the second memory cell, the second word line disposed above the first word line; and a word line defect detection circuit configured to monitor a number of pulses of a pumping clock signal while applying a first voltage to the first word line to detect a defect of the first word line. The voltage generator is configured to apply a second voltage different from the first voltage to the second word line for programming the second memory cell when the number of pulses of the pumping clock signal is smaller than a reference value.