公开(公告)号：US20200152596A1

公开(公告)日：2020-05-14

申请号：US16354359

申请日：2019-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hoe Chul KIM ,  Dong Eog KIM ,  Tae Yeong KIM

IPC: H01L23/00

Abstract: A substrate bonding apparatus includes a lower chuck, an upper chuck, an electric actuator on a central portion of the upper chuck, a pressure sensor, and a controller. The lower chuck may support a lower substrate, the upper chuck may face the lower chuck such that a lower surface of the upper chuck faces the upper surface of the lower chuck, and the upper chuck may support an upper substrate. The electric actuator may lower a bonding pin through the upper chuck to apply a pressure to the upper substrate supported on the upper chuck. The pressure sensor may be below the lower substrate supported on the lower chuck. The pressure sensor may sense a lowering pressure applied by the bonding pin to the pressure sensor in real time. The controller may control the lowering pressure applied by the bonding pin.

公开(公告)号：US20240213138A1

公开(公告)日：2024-06-27

申请号：US18524454

申请日：2023-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae Yeong KIM ,  Jun Hong MIN ,  Eun Suk JUNG ,  So Hye CHO

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/14

CPC classification number: H01L23/49894 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/29186 ,  H01L2224/29686 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01014 ,  H01L2924/35121

Abstract: A semiconductor package includes a first substrate including silicon, a first insulating layer in contact with the first substrate, the first insulating layer including silicon oxide, the first insulating layer having a first concentration of silicon, a second insulating layer in contact with the first insulating layer, the second insulating layer including silicon oxide, the second insulating layer having a second concentration of silicon, the second concentration lower than the first concentration, and a structure on the second insulating layer. The first concentration is a ratio of a weight of silicon in the first insulating layer to a total weight of the first insulating layer, the second concentration is a ratio of a weight of silicon in the second insulating layer to a total weight of the second insulating layer, and the first concentration is in a range from 20 wt % to 50 wt %.

公开(公告)号：US20180226390A1

公开(公告)日：2018-08-09

申请号：US15869808

申请日：2018-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Pil Kyu KANG ,  Seok Ho KIM ,  Tae Yeong KIM ,  Kwang Jin MOON ,  Ho Jin LEE

IPC: H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L21/768

CPC classification number: H01L25/50 ,  H01L21/187 ,  H01L21/76898 ,  H01L24/80 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/08145 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/73204 ,  H01L2224/80047 ,  H01L2224/80048 ,  H01L2224/8012 ,  H01L2224/80894 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80986 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06593 ,  H01L2924/3512 ,  H01L2224/80001 ,  H01L2224/81 ,  H01L2924/00014

Abstract: A method of manufacturing a substrate structure includes providing a first substrate including a first device region on a first surface, providing a second substrate including a second device region on a second surface, such that a width of the first device region is greater than a width of the second device region, and bonding the first substrate and the second substrate, such that the first and second device regions are facing each other and are electrically connected to each other.