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公开(公告)号:US11911839B2
公开(公告)日:2024-02-27
申请号:US17563830
申请日:2021-12-28
IPC分类号: B23K20/02 , B23K20/24 , H01L23/00 , H01L25/065 , B23K103/00 , B23K101/40
CPC分类号: B23K20/02 , B23K20/24 , H01L24/05 , H01L24/08 , H01L24/80 , B23K2101/40 , B23K2103/56 , H01L25/0657 , H01L2224/05557 , H01L2224/05567 , H01L2224/05572 , H01L2224/08147 , H01L2224/08148 , H01L2224/8003 , H01L2224/80031 , H01L2224/80048 , H01L2224/80051 , H01L2224/80097 , H01L2224/80203 , H01L2224/80345 , H01L2224/80895 , H01L2224/80896
摘要: A semiconductor device includes a first die, the first die including a first dielectric layer and a plurality of first bond pads formed within apertures in the first dielectric layer, and a second die bonded to the first die, the second die including a second dielectric layer and a plurality of second bond pads protruding from the second dielectric layer. The first die is bonded to the second die such that the plurality of second bond pads protrude into the apertures in the first dielectric layer to establish respective metallurgical bonds with the plurality of first bond pads. A reduction in the distance between the respective bond pads of the dies results in a lower temperature for establishing a hybrid bond.
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2.
公开(公告)号:US20140035129A1
公开(公告)日:2014-02-06
申请号:US13725245
申请日:2012-12-21
发明人: Michael A. Stuber , Stuart B. Molin , Mark Drucker , Peter Fowler
IPC分类号: H01L23/498 , H01L23/00
CPC分类号: H01L21/76251 , H01L21/563 , H01L21/6835 , H01L21/76256 , H01L21/78 , H01L21/84 , H01L23/3677 , H01L23/49811 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/45 , H01L24/46 , H01L24/48 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L27/092 , H01L27/1203 , H01L29/78603 , H01L29/78606 , H01L2221/6834 , H01L2221/6835 , H01L2221/68377 , H01L2221/68381 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/05611 , H01L2224/05647 , H01L2224/05666 , H01L2224/05684 , H01L2224/11 , H01L2224/11003 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/1146 , H01L2224/131 , H01L2224/13105 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48611 , H01L2224/48624 , H01L2224/48647 , H01L2224/48666 , H01L2224/48684 , H01L2224/48711 , H01L2224/48724 , H01L2224/48747 , H01L2224/48766 , H01L2224/48784 , H01L2224/48811 , H01L2224/48824 , H01L2224/48847 , H01L2224/48866 , H01L2224/48884 , H01L2224/73257 , H01L2224/80006 , H01L2224/80048 , H01L2224/80896 , H01L2224/81005 , H01L2224/81191 , H01L2224/81205 , H01L2224/81801 , H01L2224/81815 , H01L2224/83005 , H01L2224/831 , H01L2224/8382 , H01L2224/8385 , H01L2224/85205 , H01L2224/92 , H01L2224/9202 , H01L2224/9222 , H01L2224/92242 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2924/00011 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/12 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/2064 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/80 , H01L2224/83 , H01L2224/81 , H01L2224/85 , H01L2924/014 , H01L2224/03 , H01L2224/1144 , H01L2924/00012 , H01L2224/83205 , H01L2224/45015 , H01L2924/207
摘要: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board. A method of fabricating an integrated circuit assembly includes coupling a handle wafer to the active layer of a semiconductor-on-insulator wafer, removing the substrate of the semiconductor-on-insulator, forming a bond pad connecting to the active layer on the exposed insulator surface, bonding the bond pad to a printed circuit board using a solder bump, and removing the handle wafer.
摘要翻译: 集成电路组件包括具有第一表面和第二表面的绝缘层,其中绝缘层的第一表面低于集成电路组件的上平面以下10微米。 有源层接触绝缘层的第一表面。 金属接合焊盘与有源层电连接并形成在绝缘层的第二表面上,并且还与印刷电路板电连接。 制造集成电路组件的方法包括将处理晶片耦合到绝缘体上半导体晶片的有源层,去除绝缘体上半导体的衬底,形成连接到暴露绝缘体上的有源层的接合焊盘 表面,使用焊料凸块将接合焊盘接合到印刷电路板上,以及去除处理晶片。
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公开(公告)号:US20240014153A1
公开(公告)日:2024-01-11
申请号:US18257674
申请日:2021-12-13
发明人: Takashi FUJIBAYASHI , Kenji OUCHI
IPC分类号: H01L23/00
CPC分类号: H01L24/03 , H01L24/08 , H01L24/05 , H01L24/83 , H01L2224/03616 , H01L2224/03452 , H01L2224/08501 , H01L2224/08237 , H01L2224/08147 , H01L2224/8009 , H01L2224/80143 , H01L2224/80048
摘要: A substrate bonding system in one manner of the present disclosure includes a surface treatment module configured to perform plasma processing on a surface of a substrate. The substrate bonding system includes a deposition module coupled to the surface treatment module such that the substrate is transferred to the deposition module without being exposed to atmosphere, the deposition module being configured to perform a deposition process on the substrate on which the plasma processing is performed in the surface treatment module. The substrate bonding system includes a bonding module coupled to the deposition module such that the substrate is transferred to the bonding module without exposing the substrate to the atmosphere, the bonding module being configured to bond substrates on which the deposition process is performed in the deposition module, to form a bonded body.
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公开(公告)号:US11869870B1
公开(公告)日:2024-01-09
申请号:US17953697
申请日:2022-09-27
申请人: SiTime Corporation
CPC分类号: H01L24/83 , H01L24/03 , H01L24/05 , H01L24/80 , H01L25/50 , H01L2224/0346 , H01L2224/0381 , H01L2224/03826 , H01L2224/056 , H01L2224/05124 , H01L2224/05609 , H01L2224/05611 , H01L2224/05618 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05678 , H01L2224/05683 , H01L2224/08148 , H01L2224/80048 , H01L2224/80097 , H01L2224/80805 , H01L2224/83048 , H01L2224/83143 , H01L2224/83355 , H01L2224/83895 , H01L2224/83911 , H01L2224/94 , H01L2225/06513 , H01L2924/01047 , H01L2924/01079 , H01L2924/10252 , H01L2924/10253 , H01L2924/10271 , H01L2924/1461
摘要: First and second contacts are formed on first and second wafers from disparate first and second conductive materials, at least one of which is subject to surface oxidation when exposed to air. A layer of oxide-inhibiting material is disposed over a bonding surface of the first contact and the first and second wafers are positioned relative to one another such that a bonding surface of the second contact is in physical contact with the layer of oxide-inhibiting material. Thereafter, the first and second contacts and the layer of oxide-inhibiting material are heated to a temperature that renders the first and second contacts and the layer of oxide-inhibiting material to liquid phases such that at least the first and second contacts alloy into a eutectic bond.
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公开(公告)号:US20170294393A1
公开(公告)日:2017-10-12
申请号:US15093713
申请日:2016-04-07
IPC分类号: H01L23/00
CPC分类号: H01L24/05 , H01L24/03 , H01L24/27 , H01L24/29 , H01L24/80 , H01L24/83 , H01L2224/03019 , H01L2224/0312 , H01L2224/03462 , H01L2224/05547 , H01L2224/05568 , H01L2224/05582 , H01L2224/05601 , H01L2224/05611 , H01L2224/2746 , H01L2224/27825 , H01L2224/29 , H01L2224/29007 , H01L2224/29023 , H01L2224/29036 , H01L2224/29144 , H01L2224/29562 , H01L2224/2957 , H01L2224/29644 , H01L2224/32225 , H01L2224/32245 , H01L2224/80048 , H01L2224/80355 , H01L2224/80359 , H01L2224/83048 , H01L2224/83097 , H01L2224/83192 , H01L2224/83355 , H01L2924/01079 , H01L2924/1033 , H01L2924/0105 , H01L2924/00014
摘要: A method for attaching a semiconductor die to a substrate includes providing a substrate that includes an attachment layer at a surface of the substrate. The attachment layer is covered by a protective flash plating layer. The protective flash plating layer has a reflow temperature less than or equal to a reflow temperature of the attachment layer. The method further includes preheating the substrate to a temperature greater than or equal to a reflow temperature of the attachment layer, attaching a semiconductor die to the attachment layer, and cooling the substrate and semiconductor die.
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公开(公告)号:US09412644B2
公开(公告)日:2016-08-09
申请号:US14572580
申请日:2014-12-16
发明人: Michael A. Stuber , Stuart B. Molin , Mark Drucker , Peter Fowler
IPC分类号: H01L21/30 , H01L21/762 , H01L21/84
CPC分类号: H01L21/76251 , H01L21/563 , H01L21/6835 , H01L21/76256 , H01L21/78 , H01L21/84 , H01L23/3677 , H01L23/49811 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/45 , H01L24/46 , H01L24/48 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L27/092 , H01L27/1203 , H01L29/78603 , H01L29/78606 , H01L2221/6834 , H01L2221/6835 , H01L2221/68377 , H01L2221/68381 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/05611 , H01L2224/05647 , H01L2224/05666 , H01L2224/05684 , H01L2224/11 , H01L2224/11003 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/1146 , H01L2224/131 , H01L2224/13105 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48611 , H01L2224/48624 , H01L2224/48647 , H01L2224/48666 , H01L2224/48684 , H01L2224/48711 , H01L2224/48724 , H01L2224/48747 , H01L2224/48766 , H01L2224/48784 , H01L2224/48811 , H01L2224/48824 , H01L2224/48847 , H01L2224/48866 , H01L2224/48884 , H01L2224/73257 , H01L2224/80006 , H01L2224/80048 , H01L2224/80896 , H01L2224/81005 , H01L2224/81191 , H01L2224/81205 , H01L2224/81801 , H01L2224/81815 , H01L2224/83005 , H01L2224/831 , H01L2224/8382 , H01L2224/8385 , H01L2224/85205 , H01L2224/92 , H01L2224/9202 , H01L2224/9222 , H01L2224/92242 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2924/00011 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/12 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/2064 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/80 , H01L2224/83 , H01L2224/81 , H01L2224/85 , H01L2924/014 , H01L2224/03 , H01L2224/1144 , H01L2924/00012 , H01L2224/83205 , H01L2224/45015 , H01L2924/207
摘要: A first wafer is provided that includes an insulating layer, a first active layer, and a handle layer. The insulating layer has a first surface and a second surface. The first active layer contacts the first surface of the insulating layer. The handle layer contacts the second surface of the insulating layer. A second wafer is provided that includes a substrate and a second active layer. The substrate has a first surface and a second surface. The second active layer contacts the first surface of the substrate. The second wafer is bonded to the first wafer by physically connecting the first active layer to the second surface of the substrate. The handle layer is removed. A metal bond pad is formed on the second surface of the insulating layer. The metal bond pad is electrically connected to the first active layer.
摘要翻译: 提供了第一晶片,其包括绝缘层,第一有源层和手柄层。 绝缘层具有第一表面和第二表面。 第一有源层接触绝缘层的第一表面。 手柄层接触绝缘层的第二表面。 提供了第二晶片,其包括基板和第二有源层。 基板具有第一表面和第二表面。 第二有源层接触衬底的第一表面。 通过将第一有源层物理连接到衬底的第二表面,将第二晶片结合到第一晶片。 手柄层被去除。 在绝缘层的第二表面上形成金属焊盘。 金属接合焊盘电连接到第一有源层。
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公开(公告)号:US09287126B2
公开(公告)日:2016-03-15
申请号:US13872632
申请日:2013-04-29
发明人: Chien-Hua Chen , Kianush Naeli , Stephen R. Farrar
CPC分类号: H01L21/2007 , C03C27/00 , H01L24/74 , H01L24/80 , H01L2224/05638 , H01L2224/05687 , H01L2224/08145 , H01L2224/08225 , H01L2224/74 , H01L2224/75102 , H01L2224/7525 , H01L2224/759 , H01L2224/75901 , H01L2224/80048 , H01L2224/80487 , H01L2224/80488 , H01L2224/80893 , H01L2924/1461 , H01L2924/00 , H01L2224/80 , H01L2924/00012 , H01L2924/01014 , H01L2924/05442
摘要: An electric field concurrently anodically bonds together wafers of each of a plurality of independent wafer pairs.
摘要翻译: 电场同时阳极连接在多个独立晶片对中的每一个的晶片。
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公开(公告)号:US20230260955A1
公开(公告)日:2023-08-17
申请号:US17670039
申请日:2022-02-11
发明人: Ying WANG , Guan Huei SEE
CPC分类号: H01L24/80 , H01L22/22 , H01L2224/80004 , H01L2224/80896 , H01L2224/80801 , H01L2224/80011 , H01L2224/80048 , H01L2224/80986
摘要: Methods of bonding one or more dies to a substrate are provided herein. In some embodiments, a method of bonding one or more dies to a substrate includes: applying a material coating on the one or more dies or the substrate; placing the one or more dies on the substrate so that the one or more dies temporarily adhere to the substrate via surface tension or tackiness of the material coating; inspecting each of the one or more dies that are placed on the substrate for defects; and removing any of the one or more dies that are found to have defects.
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公开(公告)号:US20170301646A1
公开(公告)日:2017-10-19
申请号:US15604454
申请日:2017-05-24
申请人: IMEC VZW
发明人: Soon-Wook Kim , Lan Peng , Patrick Verdonck , Robert Miller , Gerald Peter Beyer , Eric Beyne
IPC分类号: H01L23/00
CPC分类号: H01L24/83 , H01L21/02065 , H01L21/02164 , H01L21/02167 , H01L21/02211 , H01L21/02274 , H01L21/31053 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/32 , H01L24/80 , H01L25/0657 , H01L2224/03452 , H01L2224/03462 , H01L2224/03616 , H01L2224/03845 , H01L2224/03848 , H01L2224/05568 , H01L2224/05573 , H01L2224/05576 , H01L2224/05686 , H01L2224/08121 , H01L2224/08145 , H01L2224/32501 , H01L2224/80048 , H01L2224/80097 , H01L2224/80201 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/83031 , H01L2224/83047 , H01L2224/83048 , H01L2224/83359 , H01L2924/00012 , H01L2924/0504 , H01L2924/00014 , H01L2924/20106 , H01L2924/2011
摘要: The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.
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公开(公告)号:US09368468B2
公开(公告)日:2016-06-14
申请号:US14586668
申请日:2014-12-30
发明人: Michael A. Stuber , Stuart B. Molin , Mark Drucker , Peter Fowler
CPC分类号: H01L21/76251 , H01L21/563 , H01L21/6835 , H01L21/76256 , H01L21/78 , H01L21/84 , H01L23/3677 , H01L23/49811 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/45 , H01L24/46 , H01L24/48 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L27/092 , H01L27/1203 , H01L29/78603 , H01L29/78606 , H01L2221/6834 , H01L2221/6835 , H01L2221/68377 , H01L2221/68381 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/05611 , H01L2224/05647 , H01L2224/05666 , H01L2224/05684 , H01L2224/11 , H01L2224/11003 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/1146 , H01L2224/131 , H01L2224/13105 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48611 , H01L2224/48624 , H01L2224/48647 , H01L2224/48666 , H01L2224/48684 , H01L2224/48711 , H01L2224/48724 , H01L2224/48747 , H01L2224/48766 , H01L2224/48784 , H01L2224/48811 , H01L2224/48824 , H01L2224/48847 , H01L2224/48866 , H01L2224/48884 , H01L2224/73257 , H01L2224/80006 , H01L2224/80048 , H01L2224/80896 , H01L2224/81005 , H01L2224/81191 , H01L2224/81205 , H01L2224/81801 , H01L2224/81815 , H01L2224/83005 , H01L2224/831 , H01L2224/8382 , H01L2224/8385 , H01L2224/85205 , H01L2224/92 , H01L2224/9202 , H01L2224/9222 , H01L2224/92242 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2924/00011 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/12 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/2064 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/80 , H01L2224/83 , H01L2224/81 , H01L2224/85 , H01L2924/014 , H01L2224/03 , H01L2224/1144 , H01L2924/00012 , H01L2224/83205 , H01L2224/45015 , H01L2924/207
摘要: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board.
摘要翻译: 集成电路组件包括具有第一表面和第二表面的绝缘层,其中绝缘层的第一表面低于集成电路组件的上平面以下10微米。 有源层接触绝缘层的第一表面。 金属接合焊盘与有源层电连接并形成在绝缘层的第二表面上,并且还与印刷电路板电连接。
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