公开(公告)号：US20240421034A1

公开(公告)日：2024-12-19

申请号：US18403936

申请日：2024-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungho KIM ,  Youngchan KO ,  Gyeongho KIM ,  Yongkoon LEE ,  Myungdo CHO

IPC: H01L23/42 ,  H01L23/15 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

Abstract: A semiconductor package includes: a first redistribution structure including a first insulating layer and first conductive patterns; a connection substrate on the first redistribution structure, and including a base layer and a through electrode penetrating the base layer, wherein the base layer includes a first material; a molding layer at least partially surrounding the connection substrate and disposed on the first redistribution structure, wherein the molding layer includes a second material; a second redistribution structure disposed on the molding layer and the connection substrate; and a plurality of semiconductor devices spaced apart from each other on the second redistribution structure, wherein a first thermal expansion coefficient of the first material of the base layer is less than a second thermal expansion coefficient of the second material of the molding layer, and wherein an upper surface of the base layer is substantially coplanar with an upper surface of the molding layer.

公开(公告)号：US20250006696A1

公开(公告)日：2025-01-02

申请号：US18525724

申请日：2023-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongkoon LEE ,  Youngchan KO ,  Byung Ho KIM

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L25/00

Abstract: A semiconductor package may include a first redistribution layer, bridge dies on an upper surface of the first redistribution layer, a second redistribution layer on the bridge dies and electrically connected to the bridge dies, conductive posts between the first and second redistribution layer, and semiconductor chips on an upper surface of the second redistribution layer. Each bridge die may include connection pads on an upper surface of the bridge dies. A pitch between first connection pads of a first bridge die among the bridge dies may be smaller than a pitch between second connection pads of a second bridge die among the bridge dies. A distance between an upper surface of the first bridge die and a lower surface of the second redistribution layer may be smaller than a distance between an upper surface of the second bridge die and a lower surface of the second redistribution layer.

公开(公告)号：US20210398923A1

公开(公告)日：2021-12-23

申请号：US17154041

申请日：2021-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Sangkyu LEE ,  Yongkoon LEE

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/52

Abstract: A semiconductor package includes a front redistribution structure having a first surface and a second surface, opposite to the first surface, a dielectric layer, an antenna substrate including a plurality of antenna members in the dielectric layer, a semiconductor chip having a connection pad connected to the plurality of antenna members, a conductive core structure having a first through-hole accommodating the antenna substrate and a second through-hole accommodating the semiconductor chip, and a rear redistribution structure including a conductive cover layer exposing an upper portion of the antenna substrate and covering an upper portion of the semiconductor chip, and a conductive via connecting the conductive cover layer to the conductive core structure.

公开(公告)号：US20240222280A1

公开(公告)日：2024-07-04

申请号：US18363995

申请日：2023-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： MyungDo CHO ,  Youngchan KO ,  Gyeongho KIM ,  Byung Ho KIM ,  Yongkoon LEE ,  Jeongho LEE

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/5381 ,  H01L21/486 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49833 ,  H01L23/49866 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/182

Abstract: A semiconductor package may include: a first redistribution layer structure; a bridge structure on the first redistribution layer structure; a plurality of conductive pillars on the first redistribution layer structure and side by side with the bridge structure; an encapsulant molding the bridge structure and the plurality of conductive pillars on the first redistribution layer structure; a second redistribution layer structure on the encapsulant, wherein a region of the second redistribution layer structure on the bridge structure is defined as a first region and a region other than the first region is defined as a second region; and a plurality of bonding pads at the first region. A vertical thickness of the first region may be smaller than a vertical thickness of the second region.

公开(公告)号：US20240055338A1

公开(公告)日：2024-02-15

申请号：US18218885

申请日：2023-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungho KIM ,  Youngchan KO ,  Gyeongho KIM ,  Yongkoon LEE ,  Myungdo CHO ,  Sangseok HONG

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/48 ,  H01L24/32 ,  H01L24/08 ,  H01L2924/15174 ,  H01L2924/13091 ,  H01L2924/01029 ,  H01L2924/01022 ,  H01L2224/16165 ,  H01L2224/16055 ,  H01L2224/48108 ,  H01L2224/48145 ,  H01L2224/32054 ,  H01L2224/32146 ,  H01L2224/32235 ,  H01L2224/08135

Abstract: A fan-out semiconductor package includes a wiring substrate including a first fan-in region, a fan-out region surrounding the first fan-in region, and a second fan-in region, a first fan-in chip structure, a second fan-in chip structure, a first redistribution structure including first redistribution elements disposed on a bottom surface of the wiring substrate, and a second redistribution structure disposed on a top surface of the wiring substrate, and a chip wiring structure formed on a top surface of the second chip, and the second redistribution structure includes a second redistribution layer extending to the first fan-in region and the fan-out region, a plurality of second redistribution vias integrally formed with the second redistribution layer and extending downward, and a seed layer surrounding the second redistribution layer and bottom surfaces of the plurality of second redistribution vias.

公开(公告)号：US20230016061A1

公开(公告)日：2023-01-19

申请号：US17721745

申请日：2022-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongkoon LEE ,  Myungsam KANG ,  Youngchan KO

IPC: H01L25/16 ,  H01L23/053 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L23/538 ,  H01L23/66

Abstract: A semiconductor package includes an antenna structure including an antenna member configured to transmit and receive a signal through the first surface in the dielectric layer, a connection via extending from the antenna member toward the second surface, and a ground member spaced apart from the connection via; a frame surrounding the side surface of the antenna structure; a first encapsulant covering at least a portion of the antenna structure and the frame; a redistribution structure on the second surface and including an insulating layer in contact with the antenna structure and the frame, and a redistribution conductor configured to be electrically connected to the ground member and the connection via in the insulating layer; a first semiconductor chip on the redistribution structure and electrically connected to the antenna member through the redistribution conductor; a second encapsulant encapsulating the first semiconductor chip on the redistribution structure; and a shielding layer surrounding a surface of the second encapsulant.

公开(公告)号：US20220006173A1

公开(公告)日：2022-01-06

申请号：US17205055

申请日：2021-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongkoon LEE ,  Jingu KIM ,  Sangkyu LEE

IPC: H01Q1/22 ,  H01L23/66 ,  H01L23/00

Abstract: A semiconductor package includes a redistribution wiring layer having redistribution wirings, a semiconductor chip on the redistribution wiring layer, a frame on the redistribution wiring layer, the frame surrounding the semiconductor chip, and the frame having core connection wirings electrically connected to the redistribution wirings, and an antenna structure on the frame, the antenna structure including a ground pattern layer, a first antenna insulation layer, a radiator pattern layer, a second antenna insulation layer, and a director pattern layer sequentially stacked on one another.

公开(公告)号：US20200312797A1

公开(公告)日：2020-10-01

申请号：US16703279

申请日：2019-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Changbae LEE ,  Bongju CHO ,  Younggwan KO ,  Yongkoon LEE ,  Moonil KIM ,  Youngchan KO

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L23/00

Abstract: A semiconductor package includes: a connection structure including one or more redistribution layers; a core structure disposed on a surface of the connection structure; a semiconductor chip disposed on the surface and including connection pads electrically connected to the redistribution layers of the connection structure; a first encapsulant disposed on the surface and covering at least a portion of each of the core structure and the semiconductor chip; an antenna substrate disposed on the first encapsulant and including one or more wiring layers, at least a portion of the wiring layers including an antenna pattern; and a through via penetrating at least a portion of each of the connection structure, the core structure, the first encapsulant, and the antenna substrate.