公开(公告)号：US20170178736A1

公开(公告)日：2017-06-22

申请号：US15385454

申请日：2016-12-20

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Xiang Yang ,  Huai-Yuan Tseng ,  Xiaochang Miao ,  Deepanshu Dutta

IPC: G11C16/34 ,  G11C16/16 ,  G11C16/10 ,  G11C16/26 ,  G11C16/04 ,  G11C11/56

CPC classification number: G11C16/3427 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3459 ,  G11C2211/5648

Abstract: Systems and methods for reducing residual electrons within a NAND string subsequent to performing a sensing operation using the NAND string or during the sensing operation. A middle-out programming sequence may be performed in which memory cell transistors in the middle of the NAND string are programmed and program verified prior to programming and verifying other memory cell transistors towards the drain-side end of the NAND string and/or the source-side end of the NAND string. In one example, for a NAND string with 32 memory cell transistors corresponding with word lines WL0 through WL31 from the source-side end of the NAND string to the drain-side end of the NAND string, the memory cell transistor corresponding with word line WL16 may be programmed and program verified prior to programming the memory cell transistors corresponding with word lines WL15 and WL17.

公开(公告)号：US09842657B1

公开(公告)日：2017-12-12

申请号：US15599243

申请日：2017-05-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Deepanshu Dutta ,  Xiaochang Miao ,  Muhammad Masuduzzaman

IPC: G11C16/06 ,  G11C16/34 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26 ,  G11C16/24

CPC classification number: G11C16/3459 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26 ,  G11C16/32 ,  G11C16/3481 ,  G11C2211/5622

Abstract: Multi-state programming of non-volatile memory cells, where cells being programmed to different target states are programmed concurrently, is performed by modulating the program speed of each state using a controlled amount of state-dependent weak boosting in their respective channels. In one example, the channel boosting is controlled by using a multi-stair word line ramp in conjunction with raising of the voltage on bit lines at a time based on the corresponding memory cell's target state.

公开(公告)号：US10157680B2

公开(公告)日：2018-12-18

申请号：US15385454

申请日：2016-12-20

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Xiang Yang ,  Huai-Yuan Tseng ,  Xiaochang Miao ,  Deepanshu Dutta

IPC: G11C16/06 ,  G11C16/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/08

Abstract: Systems and methods for reducing residual electrons within a NAND string subsequent to performing a sensing operation using the NAND string or during the sensing operation. A middle-out programming sequence may be performed in which memory cell transistors in the middle of the NAND string are programmed and program verified prior to programming and verifying other memory cell transistors towards the drain-side end of the NAND string and/or the source-side end of the NAND string. In one example, for a NAND string with 32 memory cell transistors corresponding with word lines WL0 through WL31 from the source-side end of the NAND string to the drain-side end of the NAND string, the memory cell transistor corresponding with word line WL16 may be programmed and program verified prior to programming the memory cell transistors corresponding with word lines WL15 and WL17.