公开(公告)号：US20230317576A1

公开(公告)日：2023-10-05

申请号：US18330133

申请日：2023-06-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen ST. GERMAIN ,  Jay A. YODER ,  Dennis Lee CONNER ,  Frank Robert CERVANTES ,  Andrew CELAYA

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L23/49805 ,  H01L23/49861 ,  H01L23/49811 ,  H01L21/568 ,  H01L23/49562 ,  H01L23/49524 ,  H01L23/3107 ,  H01L23/49575 ,  H01L2924/181 ,  H01L2924/0002

Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

公开(公告)号：US20170004965A1

公开(公告)日：2017-01-05

申请号：US15267488

申请日：2016-09-16

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： William F. BURGHOUT ,  Dennis Lee CONNER ,  Michael J. SEDDON ,  Jay A. YODER ,  Gordon M. GRIVNA

IPC: H01L21/02 ,  H01L21/78 ,  H01L21/683 ,  H01L23/544

CPC classification number: H01L21/02076 ,  H01L21/3043 ,  H01L21/3046 ,  H01L21/3065 ,  H01L21/67028 ,  H01L21/6836 ,  H01L21/78 ,  H01L21/7813 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2223/5446

Abstract: In one embodiment, semiconductor die are singulated from a semiconductor wafer having a layer of material by placing the semiconductor wafer onto a carrier tape with the layer of material adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the layer of material within the singulation lines, and separating portions of the layer of material using a fluid.

Abstract translation: 在一个实施例中，半导体管芯由具有一层材料的半导体晶片分离，通过将半导体晶片放置在载体带上，该材料层与载体带相邻，形成穿过半导体晶片的分隔线，以暴露出第 分割线，以及使用流体分离材料层的部分。

公开(公告)号：US20220084920A1

公开(公告)日：2022-03-17

申请号：US17457148

申请日：2021-12-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen ST. GERMAIN ,  Jay A. YODER ,  Dennis Lee CONNER ,  Frank Robert CERVANTES ,  Andrew Celaya

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31

Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

公开(公告)号：US20190385939A1

公开(公告)日：2019-12-19

申请号：US16554980

申请日：2019-08-29

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen ST. GERMAIN ,  Jay A. YODER ,  Dennis Lee CONNER ,  Frank Robert CERVANTES ,  Andrew Celaya

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31

Abstract: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

公开(公告)号：US20180053712A1

公开(公告)日：2018-02-22

申请号：US15240423

申请日：2016-08-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen ST. GERMAIN ,  Dennis Lee CONNER ,  Jay A. YODER

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49541 ,  H01L21/4828 ,  H01L21/4842 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/84 ,  H01L2224/29191 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/73263 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/0715

Abstract: A system, in some embodiments, comprises: a first surface of a lead frame; a second surface of the lead frame, opposite the first surface, said second surface having been etched; and one or more holes passing through said lead frame and coincident with the first and second surfaces, wherein said one or more holes are adapted to control fluid flow on said first surface.

公开(公告)号：US20170110391A1

公开(公告)日：2017-04-20

申请号：US15391960

申请日：2016-12-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen ST. GERMAIN ,  Roger M. ARBUTHNOT ,  Jay A. YODER ,  Dennis Lee CONNER

IPC: H01L23/498 ,  H01L23/495 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/49805 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49861 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and mechanically coupled with at least one electrical contact on a second face of the die where the second face of the die is on an opposing side of the die from the first face of the die. The at least one clip may include at least one lead in electrical communication with the at least one electrical contact on the second face of the die. A mold compound or an encapsulating compound may be included around the die and a majority of the at least one clip where a portion of the at least one lead and a portion of the plurality of electrical contacts on the first face of the die are not overmolded or encapsulated. The semiconductor package includes no lead frame.