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    Light-emitting diode
    1.
    发明授权
    Light-emitting diode 有权

    公开(公告)号：US10177281B2

    公开(公告)日：2019-01-08

    申请号：US15722826

    申请日：2017-10-02

    Applicant: SEOUL VIOSYS CO., LTD.

    Inventor： Chi Hyun In ,  Sang Min Kim ,  Dae Seok Park ,  Eun Ji Park ,  Hong Suk Cho

    IPC: H01L33/46 ,  H01L33/62 ,  H01L33/14 ,  H01L33/40 ,  H01L33/38 ,  H01L33/44

    Abstract: A light emitting diode includes a substrate, a lower semiconductor layer disposed on the substrate, a light emitting unit comprising a first upper semiconductor layer disposed in one region of the lower semiconductor layer and an active layer interposed between the lower semiconductor layer and the first upper semiconductor layer, a second current spreading portion comprising a third upper semiconductor layer disposed in another region of the lower semiconductor layer and an active layer interposed between the lower semiconductor layer and the third upper semiconductor layer, a first electrode disposed on the light emitting cell and electrically connected to the first upper semiconductor layer, and a second electrode separated from the light emitting cell and electrically connected to the lower semiconductor layer.

    METHOD OF SEPARATING SUBSTRATE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME
    4.
    发明申请
    METHOD OF SEPARATING SUBSTRATE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME 有权
    分离基板的方法和使用其制造半导体器件的方法

    公开(公告)号：US20140179043A1

    公开(公告)日：2014-06-26

    申请号：US14138923

    申请日：2013-12-23

    Applicant: Seoul Viosys Co., Ltd.

    Inventor： Jong Min Jang ,  Hwa Mok Kim ,  Kyu Ho Lee ,  Chang Hoon Kim ,  Daewoong Suh ,  Chi Hyun In ,  Dae Seok Park ,  Jong Hyeon Chae

    IPC: H01L33/00

    CPC classification number: H01L33/0079 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0095 ,  H01L33/22

    Abstract: A method of fabricating a semiconductor device, the method including: forming a first mask pattern including a masking region and an open region on a substrate; forming a sacrificial layer to cover the substrate and the first mask pattern; patterning the sacrificial layer to form a seed layer and to expose the first mask pattern; forming a second mask pattern on the exposed first mask pattern; forming an epitaxial layer on the seed layer and the second mask pattern, and forming a void between the second mask pattern and the epitaxial layer; and separating the substrate from the epitaxial layer.

    Abstract translation: 一种制造半导体器件的方法，所述方法包括：在衬底上形成包括掩模区域和开放区域的第一掩模图案; 形成覆盖衬底和第一掩模图案的牺牲层; 图案化所述牺牲层以形成种子层并暴露所述第一掩模图案; 在所述暴露的第一掩模图案上形成第二掩模图案; 在种子层和第二掩模图案上形成外延层，并在第二掩模图案和外延层之间形成空隙; 以及将衬底与外延层分离。

    Method of separating substrate and method of fabricating semiconductor device using the same
    7.
    发明授权
    Method of separating substrate and method of fabricating semiconductor device using the same 有权
    分离衬底的方法和使用其制造半导体器件的方法

    公开(公告)号：US09048348B2

    公开(公告)日：2015-06-02

    申请号：US14138923

    申请日：2013-12-23

    Applicant: Seoul Viosys Co., Ltd.

    Inventor： Jong Min Jang ,  Hwa Mok Kim ,  Kyu Ho Lee ,  Chang Hoon Kim ,  Daewoong Suh ,  Chi Hyun In ,  Dae Seok Park ,  Jong Hyeon Chae

    IPC: H01L21/30 ,  H01L33/00 ,  H01L33/22

    CPC classification number: H01L33/0079 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0095 ,  H01L33/22

    Abstract: A method of fabricating a semiconductor device, the method including: forming a first mask pattern including a masking region and an open region on a substrate; forming a sacrificial layer to cover the substrate and the first mask pattern; patterning the sacrificial layer to form a seed layer and to expose the first mask pattern; forming a second mask pattern on the exposed first mask pattern; forming an epitaxial layer on the seed layer and the second mask pattern, and forming a void between the second mask pattern and the epitaxial layer; and separating the substrate from the epitaxial layer.

    Abstract translation: 一种制造半导体器件的方法，所述方法包括：在衬底上形成包括掩模区域和开放区域的第一掩模图案; 形成覆盖衬底和第一掩模图案的牺牲层; 图案化所述牺牲层以形成种子层并暴露所述第一掩模图案; 在所述暴露的第一掩模图案上形成第二掩模图案; 在种子层和第二掩模图案上形成外延层，并在第二掩模图案和外延层之间形成空隙; 以及将衬底与外延层分离。

    LIGHT EMITTING DIODE CHIP AND LIGHT EMITTING DEVICE HAVING THE SAME
    8.
    发明申请
    LIGHT EMITTING DIODE CHIP AND LIGHT EMITTING DEVICE HAVING THE SAME 审中-公开
    发光二极管芯片和具有该发光二极管的发光器件

    公开(公告)号：US20150091042A1

    公开(公告)日：2015-04-02

    申请号：US14498910

    申请日：2014-09-26

    Applicant: Seoul Viosys Co., Ltd.

    Inventor： Chang Hoon Kim ,  Sang Min Kim ,  Chi Hyun In ,  Hong Suk Cho ,  Dae Seok Park

    IPC: H01L33/24 ,  H01L33/38

    CPC classification number: H01L33/38 ,  H01L24/14 ,  H01L33/62 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/00

    Abstract: A light emitting diode (LED) chip can include: a first pattern region having one or more curved parts; and a second pattern region at least partially surrounding the first pattern region. The first pattern region can include a first conductive type nitride-based semiconductor layer, an active layer, a second conductive type nitride-based semiconductor layer, a top electrode layer, and a top bump layer stacked over a substrate, the second pattern region can include a first conductive type nitride-based semiconductor layer, a bottom electrode layer, and a bottom bump layer stacked over the substrate, and the first pattern region can include one or more protrusion patterns formed in the one or more curved part.

    Abstract translation: 发光二极管（LED）芯片可以包括：具有一个或多个弯曲部分的第一图案区域; 以及至少部分地围绕所述第一图案区域的第二图案区域。 第一图案区域可以包括堆叠在衬底上的第一导电氮化物基半导体层，有源层，第二导电氮化物基半导体层，顶电极层和顶部隆起层，第二图案区域可以 包括层叠在基板上的第一导电型氮化物系半导体层，底部电极层和底部隆起层，第一图案区域可以包括形成在一个以上的弯曲部中的一个以上突起图案。

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