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公开(公告)号:US11600538B2
公开(公告)日:2023-03-07
申请号:US17456506
申请日:2021-11-24
Applicant: SHOWA DENKO K.K.
Inventor: Naoto Ishibashi , Koichi Murata , Hidekazu Tsuchida
Abstract: A SiC epitaxial wafer according to an embodiment includes: a SiC substrate; and a SiC epitaxial layer formed on a first surface of the SiC substrate. The in-plane uniformity of a density of Z1/2 centers of the SiC epitaxial layer is 5% or less.
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公开(公告)号:US20220146564A1
公开(公告)日:2022-05-12
申请号:US17519679
申请日:2021-11-05
Applicant: SHOWA DENKO K.K.
Inventor: Koichi Murata , Isaho KAMATA , Hidekazu TSUCHIDA , Akira MIYASAKA
Abstract: A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.
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公开(公告)号:US11906569B2
公开(公告)日:2024-02-20
申请号:US17519679
申请日:2021-11-05
Applicant: SHOWA DENKO K.K.
Inventor: Koichi Murata , Isaho Kamata , Hidekazu Tsuchida , Akira Miyasaka
IPC: G01R1/06 , G01R31/26 , H01L21/66 , G01R1/067 , C30B29/36 , C23C16/32 , C23C16/52 , C30B25/16 , G01R31/265 , C30B35/00
CPC classification number: G01R31/2601 , C23C16/325 , C23C16/52 , C30B25/16 , C30B29/36 , G01R1/06783 , G01R31/2648 , G01R31/2656 , H01L22/20 , C30B35/00
Abstract: A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.
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