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公开(公告)号:US10774444B2
公开(公告)日:2020-09-15
申请号:US16063911
申请日:2016-12-12
Applicant: SHOWA DENKO K.K.
Inventor: Daisuke Muto , Akira Miyasaka
Abstract: This method of producing a SiC epitaxial wafer having an epitaxial layer on a SiC single crystal substrate, and includes: when performing crystal growth of the epitaxial layer, a step of forming a part of an epitaxial layer under first conditions at an initial stage where the crystal growth is started; and a step of forming a part of a SiC epitaxial layer under second conditions in which a Cl/Si ratio is decreased and a C/Si ratio is increased in comparison to those in the first conditions, wherein the C/Si ratio is equal to or less than 0.6 and the Cl/Si ratio is equal to or more than 5.0 in the first conditions.
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公开(公告)号:US09679767B2
公开(公告)日:2017-06-13
申请号:US14407397
申请日:2013-06-19
Applicant: SHOWA DENKO K.K.
Inventor: Akira Miyasaka , Yutaka Tajima , Yoshiaki Kageshima , Daisuke Muto , Kenji Momose
CPC classification number: H01L21/0262 , C23C16/325 , C30B25/00 , C30B25/186 , C30B25/20 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L22/12 , H01L29/0692 , H01L29/1608 , H01L29/34
Abstract: Provided is a method of manufacturing a SiC epitaxial wafer including a SiC epitaxial layer on a SiC substrate using a SiC-CVD furnace which is installed in a glove box. The method includes a SiC substrate placement step of placing the SiC substrate in the SiC-CVD furnace while circulating gas in the glove box.
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公开(公告)号:US11906569B2
公开(公告)日:2024-02-20
申请号:US17519679
申请日:2021-11-05
Applicant: SHOWA DENKO K.K.
Inventor: Koichi Murata , Isaho Kamata , Hidekazu Tsuchida , Akira Miyasaka
IPC: G01R1/06 , G01R31/26 , H01L21/66 , G01R1/067 , C30B29/36 , C23C16/32 , C23C16/52 , C30B25/16 , G01R31/265 , C30B35/00
CPC classification number: G01R31/2601 , C23C16/325 , C23C16/52 , C30B25/16 , C30B29/36 , G01R1/06783 , G01R31/2648 , G01R31/2656 , H01L22/20 , C30B35/00
Abstract: A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.
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公开(公告)号:US10176987B2
公开(公告)日:2019-01-08
申请号:US15587258
申请日:2017-05-04
Applicant: SHOWA DENKO K.K.
Inventor: Akira Miyasaka , Yutaka Tajima , Yoshiaki Kageshima , Daisuke Muto , Kenji Momose
IPC: H01L21/02 , H01L29/34 , C23C16/32 , H01L29/16 , H01L29/06 , C30B25/18 , C30B25/00 , C30B29/36 , C30B25/20 , H01L21/66
Abstract: A SiC epitaxial wafer including: a SiC epitaxial layer that is formed on a SiC substrate having an off angle, wherein the surface density of triangular defects, in which a distance from a starting point to an opposite side in a horizontal direction is equal to or greater than (a thickness of the SiC epitaxial layer/tan(x))×90% and equal to or less than (the thickness of the SiC epitaxial layer/tan(x))×110%, in the SiC epitaxial layer is in the range of 0.05 pieces/cm2 to 0.5 pieces/cm2 (where x indicates the off angle).
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公开(公告)号:US20150162187A1
公开(公告)日:2015-06-11
申请号:US14407397
申请日:2013-06-19
Applicant: SHOWA DENKO K.K.
Inventor: Akira Miyasaka , Yutaka Tajima , Yoshiaki Kageshima , Daisuke Muto , Kenji Momose
CPC classification number: H01L21/0262 , C23C16/325 , C30B25/00 , C30B25/186 , C30B25/20 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L22/12 , H01L29/0692 , H01L29/1608 , H01L29/34
Abstract: Provided is a method of manufacturing a SiC epitaxial wafer including a SiC epitaxial layer on a SiC substrate using a SiC-CVD furnace which is installed in a glove box. The method includes a SiC substrate placement step of placing the SiC substrate in the SiC-CVD furnace while circulating gas in the glove box.
Abstract translation: 提供了使用安装在手套箱中的SiC-CVD炉在SiC衬底上制造包括SiC外延层的SiC外延晶片的方法。 该方法包括将SiC衬底放置在SiC-CVD炉中同时在手套箱中循环气体的SiC衬底放置步骤。
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