公开(公告)号：US11730062B2

公开(公告)日：2023-08-15

申请号：US17032938

申请日：2020-09-25

Applicant: SK hynix Inc. ,  Kioxia Corporation

Inventor： Tae Young Lee ,  Guk Cheon Kim ,  Soo Gil Kim ,  Soo Man Seo ,  Jong Koo Lim ,  Taiga Isoda

IPC: H10N50/80 ,  G11C11/16 ,  H10N50/85

CPC classification number: H10N50/80 ,  G11C11/161 ,  H10N50/85

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure including a free layer, a pinned layer, and a tunnel barrier layer, the free layer having a variable magnetization direction, the pinned layer having a fixed magnetization direction, the tunnel barrier layer being interposed between the free layer and the pinned layer; and a thermal stability enhanced layer (TSEL) including a homogeneous material having an Fe—O bond.

公开(公告)号：US08879313B2

公开(公告)日：2014-11-04

申请号：US14297243

申请日：2014-06-05

Applicant: SK Hynix Inc.

Inventor： Hae Chan Park ,  Soo Gil Kim

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/0069 ,  G11C11/00 ,  G11C13/0004 ,  G11C13/0033 ,  G11C2013/0092 ,  Y10S977/754

Abstract: A semiconductor integrated circuit system includes a phase-change line including a first phase-change area constituting a first memory cell and a second phase-change area constituting a second memory cell, a write current providing unit configured to phase-change a selected one of the first and second phase-change areas, and a phase-change compensation unit configured to restore the other of the first and second phase-change areas by compensating for a dummy phase-change caused in the other phase-change area due to a phase-change of the selected phase-change area.

Abstract translation: 一种半导体集成电路系统包括：相变线，包括构成第一存储单元的第一相变区和构成第二存储单元的第二相变区;写入电流提供单元，被配置为对 第一相变区和第二相变区，以及相变补偿单元，被配置为通过补偿由于相位而在另一个相变区域中引起的虚拟相位变化来恢复第一和第二相变区域中的另一个 - 所选择的相变区域的更换。

公开(公告)号：US10797239B2

公开(公告)日：2020-10-06

申请号：US16413491

申请日：2019-05-15

Applicant: SK hynix Inc.

Inventor： Joo Young Moon ,  Young Seok Ko ,  Soo Gil Kim

IPC: H01L45/00

Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.

公开(公告)号：US08917545B2

公开(公告)日：2014-12-23

申请号：US14183193

申请日：2014-02-18

Applicant: SK Hynix Inc.

Inventor： Myoung Sub Kim ,  Soo Gil Kim ,  Nam Kyun Park ,  Sung Cheoul Kim ,  Gap Sok Do ,  Joon Seop Sim ,  Hyun Jeong Lee

IPC: G11C11/00 ,  H01L45/00 ,  G11C13/00 ,  H01L27/24

CPC classification number: H01L45/1675 ,  G11C13/0004 ,  G11C2013/008 ,  G11C2213/71 ,  H01L27/2409 ,  H01L27/249 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/1246 ,  H01L45/126 ,  H01L45/144

Abstract: A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode.

Abstract translation: 提供了一种半导体集成电路器件及其制造方法及其驱动方法。 该器件包括半导体衬底，从半导体衬底的表面延伸的上电极; 多个开关结构，其从与上述半导体基板的表面平行的方向从上述电极的两侧延伸;以及相变材料层，设置在上述多个开关结构体和上部电极之间。

公开(公告)号：US11183635B2

公开(公告)日：2021-11-23

申请号：US17010194

申请日：2020-09-02

Applicant: SK hynix Inc.

Inventor： Joo Young Moon ,  Young Seok Ko ,  Soo Gil Kim

IPC: H01L45/00

Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.

公开(公告)号：US11043533B2

公开(公告)日：2021-06-22

申请号：US16455608

申请日：2019-06-27

Applicant: SK hynix Inc.

Inventor： Beom Yong Kim ,  Soo Gil Kim

IPC: H01L27/24 ,  H01L45/00 ,  G11C11/28 ,  H01L21/8238 ,  H01G2/00

Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.

公开(公告)号：US20210184101A1

公开(公告)日：2021-06-17

申请号：US16991645

申请日：2020-08-12

Applicant: SK hynix Inc.

Inventor： Tae Young Lee ,  Guk Cheon Kim ,  Soo Gil Kim ,  Min Seok Moon ,  Jong Koo Lim ,  Sung Woong Chung

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/10 ,  H01L43/12

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n−1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n−1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n−1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.

公开(公告)号：US10381407B2

公开(公告)日：2019-08-13

申请号：US15432806

申请日：2017-02-14

Applicant: SK hynix Inc.

Inventor： Beom Yong Kim ,  Soo Gil Kim

IPC: H01G2/00 ,  G11C11/28 ,  H01L27/24 ,  H01L45/00 ,  H01L21/8238

Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.

公开(公告)号：US10217797B2

公开(公告)日：2019-02-26

申请号：US15789712

申请日：2017-10-20

Applicant: SK hynix Inc.

Inventor： Beom Yong Kim ,  Soo Gil Kim

IPC: H01L27/24 ,  H01L45/00 ,  H01L31/062

Abstract: A switching device includes a first electrode, a switching layer having a non-memory characteristic, and a second electrode that are disposed over a substrate. The switching layer includes an oxide of a first atom or a nitride of the first atom, and a second atom is doped in the oxide or the nitride. The second atom forms a trap site trapping a conductive carrier in the switching layer when a voltage having an absolute value that is smaller than an absolute value of a predetermined threshold voltage is applied between the first and the second electrodes. The second atom forms a moving path through which the conductive carrier moves between the first electrode and the second electrode when a voltage having an absolute value that is greater than an absolute value of a predetermined threshold voltage is applied between the first and the second electrodes.

公开(公告)号：US12260909B2

公开(公告)日：2025-03-25

申请号：US18188332

申请日：2023-03-22

Applicant: SK hynix Inc. ,  Foundation for Research and Business, Seoul National University of Science and Technology ,  INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUS

Inventor： Tae Jung Ha ,  Soo Gil Kim ,  Jeong Hwan Song ,  Byung Joon Choi ,  Ha Young Lee

IPC: G11C7/00 ,  G11C11/16 ,  G11C13/00

Abstract: Operating a selector device that controls access of a signal to a memory element may comprise applying a main operating voltage pulse and a refresh voltage pulse to the selector device. The refresh voltage pulse and main operating voltage pulse have opposite polarities. A magnitude of the main operating voltage pulse is greater than or equal to a threshold voltage for turning on the selector device, and a maximum magnitude of the refresh voltage pulse is less than the threshold voltage. The refresh voltage pulse reduces a difference between the threshold voltage and a turn-off voltage of the selector device, and may be applied immediately before or immediately after the main operating voltage pulse. An electronic circuit may include the selector device and a driving circuit for apply the pulses. A nonvolatile memory may include the driving circuit and a plurality of nonvolatile memory elements each including a selector device.