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    MEMORY DEVICE INCLUDING ERROR CORRECTION DEVICE
    1.
    发明公开
    MEMORY DEVICE INCLUDING ERROR CORRECTION DEVICE 审中-公开

    公开(公告)号：US20240177793A1

    公开(公告)日：2024-05-30

    申请号：US18314147

    申请日：2023-05-09

    Applicant: SK hynix Inc.

    Inventor： Jin Ho JEONG ,  Dae Suk KIM ,  Sang Woo YOON ,  A Ram RIM ,  Mun Seon JANG

    IPC: G11C29/52 ,  G11C29/00 ,  G11C29/44

    CPC classification number: G11C29/52 ,  G11C29/44 ,  G11C29/789

    Abstract: A memory device includes a memory cell area including a plurality of cell blocks divided into a plurality of normal cell blocks, at least one ECC cell block, and at least one redundancy cell block, the plurality of cell blocks being configured to output data and error correction codes; an error correction circuit configured to generate error-corrected data by correcting errors in the data using the error correction codes; a first switch group configured to output the error-corrected data while performing, according to first repair control information, a shifting operation on the error-corrected data; and a second switch group configured to transfer the data from the memory cell area to the error correction circuit while performing, according to second repair control information, a zero-padding operation on the data output from one of the cell blocks.

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220406399A1

    公开(公告)日：2022-12-22

    申请号：US17490443

    申请日：2021-09-30

    Applicant: SK hynix Inc.

    Inventor： A Ram RIM ,  Tae Sik YUN

    IPC: G11C29/00

    Abstract: A semiconductor device includes a memory bank including a first memory block, a second memory block, and a redundancy memory block, and a column line selection circuit configured, when a fail occurs in a first column line of the first memory block, to replace the first column line of the first memory block with a first redundancy line of the redundancy memory block, and replace a second column line of the second memory block with a second redundancy line of the redundancy memory block.

    SEMICONDUCTOR APPARATUS INCLUDING A POWER GATING CIRCUIT AND A REPAIR METHOD OF THE SEMICONDUCTOR APPARATUS
    4.
    发明申请
    SEMICONDUCTOR APPARATUS INCLUDING A POWER GATING CIRCUIT AND A REPAIR METHOD OF THE SEMICONDUCTOR APPARATUS 审中-公开

    公开(公告)号：US20180337676A1

    公开(公告)日：2018-11-22

    申请号：US15830917

    申请日：2017-12-04

    Applicant: SK hynix Inc.

    Inventor： Woongrae KIM ,  Bok Rim KO ,  A Ram RIM

    IPC: H03K19/003 ,  H01L23/525 ,  H03K17/687

    CPC classification number: H03K19/003 ,  H01L23/5256 ,  H03K17/687

    Abstract: A semiconductor apparatus may include a logic circuit, a power gating circuit and a power gating control system. The logic circuit may operate by receiving a first power supply voltage and a second power supply voltage, and may retain an output signal at a predetermined logic value during a standby operation of the semiconductor apparatus. The power gating circuit may apply the first power supply voltage and the second power supply voltage to the logic circuit when a gating control signal is in an enabled state. The power gating control system may test whether the output signal of the logic circuit retains the predetermined logic value when the power gating circuit is turned off, and may generate the gating control signal based on a test result and an operation mode of the semiconductor apparatus.

    SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS
    5.
    发明申请
    SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS 有权
    半导体器件和半导体系统

    公开(公告)号：US20160307616A1

    公开(公告)日：2016-10-20

    申请号：US14808163

    申请日：2015-07-24

    Applicant: SK hynix Inc.

    Inventor： A Ram RIM ,  Ho Uk SONG

    IPC: G11C11/4074 ,  G11C11/4093 ,  G11C11/4091 ,  G11C11/408 ,  G11C11/406 ,  G11C11/4076 ,  G11C11/4096

    CPC classification number: G11C11/4074 ,  G11C7/04 ,  G11C7/222 ,  G11C11/406 ,  G11C11/4076 ,  G11C11/4087 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/4096 ,  G11C29/026 ,  G11C29/028 ,  G11C2029/0409

    Abstract: A semiconductor device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, an enablement moment of the first power control signal controlled according to a logic level combination of temperature code signals in response to a mode signal. The sense amplifier circuit may generate a first power signal driven in response to the first power control signal and may generate a second power signal driven in response to a second power control signal. The sense amplifier circuit may sense and amplify a level of a bit line using the first power signal and the second power signal.

    Abstract translation: 半导体器件可以包括功率控制信号发生器和读出放大器电路。 功率控制信号发生器可以产生第一功率控制信号，响应于模式信号，根据温度代码信号的逻辑电平组合来控制第一功率控制信号的使能力矩。 感测放大器电路可以产生响应于第一功率控制信号而被驱动的第一功率信号，并且可以产生响应于第二功率控制信号而被驱动的第二功率信号。 感测放大器电路可以使用第一功率信号和第二功率信号来感测和放大位线的电平。

    INTERNAL VOLTAGE GENERATING CIRCUIT
    6.
    发明申请
    INTERNAL VOLTAGE GENERATING CIRCUIT 有权
    内部电压发生电路

    公开(公告)号：US20160254034A1

    公开(公告)日：2016-09-01

    申请号：US14723749

    申请日：2015-05-28

    Applicant: SK hynix Inc.

    Inventor： Ho Uk SONG ,  A Ram RIM

    IPC: G11C5/14

    CPC classification number: G11C5/147 ,  G11C7/04

    Abstract: An internal voltage generation circuit may include a temperature information generation unit configured to generate a temperature code having a code value corresponding to a temperature. The temperature information generation unit may include a process variation information generation unit configured to generate a process code having a code value corresponding to a process variation. The temperature information generation unit may include a code combination unit configured to generate a combination code in response to a ratio control signal, the temperature code, and the process code. The temperature information generation unit may include an internal voltage generation unit configured to generate an internal voltage having a voltage level corresponding to a code value of the combination code.

    Abstract translation: 内部电压产生电路可以包括温度信息生成单元，其被配置为生成具有与温度对应的代码值的温度代码。 温度信息生成单元可以包括处理变化信息生成单元，其被配置为生成具有与处理变化相对应的代码值的处理代码。 温度信息生成单元可以包括代码组合单元，其被配置为响应于比率控制信号，温度代码和处理代码来生成组合代码。 温度信息生成单元可以包括内部电压生成单元，其被配置为生成具有与组合代码的代码值相对应的电压电平的内部电压。

    APPARATUS AND SYSTEM FOR ADJUSTING INTERNAL VOLTAGE
    7.
    发明申请
    APPARATUS AND SYSTEM FOR ADJUSTING INTERNAL VOLTAGE 有权
    调整内部电压的装置和系统

    公开(公告)号：US20160056716A1

    公开(公告)日：2016-02-25

    申请号：US14593138

    申请日：2015-01-09

    Applicant: SK hynix Inc.

    Inventor： Ho Uk SONG ,  A Ram RIM

    IPC: H02M3/156 ,  H02M1/08

    CPC classification number: H02M3/156 ,  G01R31/2608 ,  G01R31/2621 ,  G01R31/2884 ,  G01R31/3004 ,  G01R35/00 ,  G05F1/00 ,  H02M1/08 ,  H02M2001/0048

    Abstract: An apparatus for adjusting an internal voltage includes a device characteristic detection circuit which detects a device characteristic, compares the device characteristic with an external clock, and generates a comparison signal, and an internal voltage adjustment circuit which receives an adjustment code generated based on the comparison signal, adjusts a level of an internal voltage, and generates a level-adjusted internal voltage.

    Abstract translation: 用于调整内部电压的装置包括检测器件特性的器件特性检测电路，将器件特性与外部时钟进行比较并产生比较信号;以及内部电压调整电路，其接收基于比较产生的调整代码 信号，调节内部电压的电平，并产生电平调节的内部电压。

    SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME 有权
    半导体器件和半导体系统，包括它们

    公开(公告)号：US20150348611A1

    公开(公告)日：2015-12-03

    申请号：US14501968

    申请日：2014-09-30

    Applicant: SK hynix Inc.

    Inventor： A Ram RIM ,  Ho Uk SONG

    IPC: G11C11/4074 ,  G11C11/406

    CPC classification number: G11C11/4074 ,  G11C7/04 ,  G11C7/08 ,  G11C11/40626 ,  G11C11/4091

    Abstract: A semiconductor memory device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, the first power control signal having an enablement period that may be controlled in response to a temperature signal having a cycle time. The cycle time may be controlled according to a mode signal and an internal temperature. The sense amplifier circuit may generate a first power signal driven to have a first drive voltage in response to the first power control signal. In addition, the sense amplifier circuit may sense and amplify a level of a bit line using the first power signal as a power supply voltage.

    Abstract translation: 半导体存储器件可以包括功率控制信号发生器和读出放大器电路。 功率控制信号发生器可以产生第一功率控制信号，第一功率控制信号具有可响应于具有周期时间的温度信号来控制的启动周期。 循环时间可以根据模式信号和内部温度来控制。 感测放大器电路可以产生被驱动以响应于第一功率控制信号而具有第一驱动电压的第一功率信号。 此外，读出放大器电路可以使用第一功率信号作为电源电压来感测和放大位线的电平。

    TEST CIRCUIT OF SEMICONDUCTOR APPARATUS
    9.
    发明申请
    TEST CIRCUIT OF SEMICONDUCTOR APPARATUS 有权
    半导体器件测试电路

    公开(公告)号：US20150187434A1

    公开(公告)日：2015-07-02

    申请号：US14248429

    申请日：2014-04-09

    Applicant: SK hynix Inc.

    Inventor： A Ram RIM

    IPC: G11C29/08 ,  G06F11/26

    CPC classification number: G11C29/08 ,  G06F11/26 ,  G11C29/40

    Abstract: A test circuit of a semiconductor apparatus includes a plurality of memory blocks, and a comparison block configured to compare data of two memory blocks, wherein the two of the plurality of memory blocks do not share word lines.

    Abstract translation: 半导体装置的测试电路包括多个存储块，比较块被配置为比较两个存储块的数据，其中多个存储块中的两个不共享字线。

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