-
公开(公告)号：US20140176167A1
公开(公告)日：2014-06-26
申请号：US13845308
申请日：2013-03-18
Applicant: SK HYNIX INC.
Inventor： Young Suk SEO , Ho Uk SONG , Jun Hyun CHUN , Tae Jin KANG
IPC: G01R31/26
CPC classification number: G01R31/2644 , G01R31/2607 , G11C7/222 , G11C29/023 , G11C29/028 , G11C29/12015 , G11C29/50012 , H03L1/00 , H03L7/06
Abstract: A semiconductor apparatus includes: an output timing controller configured to delay an applied external read command by a predetermined time and generate a normal output enable flag signal, during a normal mode, a test output timing controller configured to generate a DLL clock signal from an external clock signal, delay the applied external read command in synchronization with the DLL clock signal, and output the delayed applied external read command as a test output enable flag signal, during a test mode, and a multiplexer (MUX) configured to output any one of the normal output enable flag signal or the test output enable flag signal as an output enable flag signal.
Abstract translation: 一种半导体装置，包括：输出定时控制器，被配置为将施加的外部读取命令延迟预定时间，并且在正常模式期间产生正常输出使能标志信号，所述测试输出定时控制器被配置为从外部产生DLL时钟信号 时钟信号，与DLL时钟信号同步地延迟施加的外部读取命令，并且在测试模式期间输出延迟的外部应用外部读取命令作为测试输出使能标志信号，以及多路复用器（MUX），其被配置为输出任何一个 正常输出使能标志信号或测试输出使能标志信号作为输出使能标志信号。
-
公开(公告)号：US20170133079A1
公开(公告)日：2017-05-11
申请号：US15405832
申请日：2017-01-13
Applicant: SK hynix Inc.
Inventor： A Ram RIM , Ho Uk SONG
IPC: G11C11/4074 , G11C11/4076 , G11C11/406 , G11C11/4096 , G11C11/408 , G11C11/4091 , G11C11/4093
CPC classification number: G11C11/4074 , G11C7/04 , G11C7/222 , G11C11/406 , G11C11/4076 , G11C11/4087 , G11C11/4091 , G11C11/4093 , G11C11/4096 , G11C29/026 , G11C29/028 , G11C2029/0409
Abstract: A semiconductor device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, an enablement moment of the first power control signal controlled according to a logic level combination of temperature code signals in response to a mode signal. The sense amplifier circuit may generate a first power signal driven in response to the first power control signal and may generate a second power signal driven in response to a second power control signal. The sense amplifier circuit may sense and amplify a level of a bit line using the first power signal and the second power signal.
-
公开(公告)号：US20150008963A1
公开(公告)日：2015-01-08
申请号：US14083958
申请日：2013-11-19
Applicant: SK hynix Inc.
Inventor： Ho Uk SONG
IPC: H03K19/003
CPC classification number: H03K19/00361
Abstract: An output apparatus includes an output driving unit configured to drive a final output signal; an output compensating signal generation unit configured to generate a delayed output signal by delaying the output signal by a predetermined time, and generate an output compensating signal based on the delayed output signal and the output signal; and an output driving compensation unit configured to compensate for the final output signal to a level opposite to a level to which the final output signal is driven.
Abstract translation: 输出装置包括被配置为驱动最终输出信号的输出驱动单元; 输出补偿信号生成单元，被配置为通过将输出信号延迟预定时间来产生延迟的输出信号，并且基于延迟的输出信号和输出信号生成输出补偿信号; 以及输出驱动补偿单元，被配置为将最终输出信号补偿到与最终输出信号被驱动的电平相反的电平。
-
公开(公告)号：US20140177313A1
公开(公告)日：2014-06-26
申请号：US13845192
申请日：2013-03-18
Applicant: SK HYNIX INC.
Inventor： Joo Hyeon LEE , Jun Hyun CHUN , Ho Uk SONG
IPC: G11C17/16
CPC classification number: G11C17/16 , G11C5/148 , G11C7/20 , G11C8/10 , G11C17/165 , G11C17/18 , G11C29/785 , G11C29/787 , G11C2029/4402
Abstract: A semiconductor device and method of operation having reduced read time of fuse array information during boot-up operation. When fuse array information is read, only repaired fuse-set information is read such that a read time of the semiconductor memory device is reduced, resulting in an increased read margin.
Abstract translation: 半导体装置和操作方法在引导操作期间具有减少的熔丝阵列信息的读取时间。 当读取熔丝阵列信息时，仅读取修复的熔丝组信息，使得半导体存储器件的读取时间减小，从而增加读取余量。
-
公开(公告)号：US20160307616A1
公开(公告)日：2016-10-20
申请号：US14808163
申请日：2015-07-24
Applicant: SK hynix Inc.
Inventor： A Ram RIM , Ho Uk SONG
IPC: G11C11/4074 , G11C11/4093 , G11C11/4091 , G11C11/408 , G11C11/406 , G11C11/4076 , G11C11/4096
CPC classification number: G11C11/4074 , G11C7/04 , G11C7/222 , G11C11/406 , G11C11/4076 , G11C11/4087 , G11C11/4091 , G11C11/4093 , G11C11/4096 , G11C29/026 , G11C29/028 , G11C2029/0409
Abstract: A semiconductor device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, an enablement moment of the first power control signal controlled according to a logic level combination of temperature code signals in response to a mode signal. The sense amplifier circuit may generate a first power signal driven in response to the first power control signal and may generate a second power signal driven in response to a second power control signal. The sense amplifier circuit may sense and amplify a level of a bit line using the first power signal and the second power signal.
Abstract translation: 半导体器件可以包括功率控制信号发生器和读出放大器电路。 功率控制信号发生器可以产生第一功率控制信号，响应于模式信号，根据温度代码信号的逻辑电平组合来控制第一功率控制信号的使能力矩。 感测放大器电路可以产生响应于第一功率控制信号而被驱动的第一功率信号，并且可以产生响应于第二功率控制信号而被驱动的第二功率信号。 感测放大器电路可以使用第一功率信号和第二功率信号来感测和放大位线的电平。
-
Patent Agency Ranking
公开(公告)号：US20150338456A1
公开(公告)日：2015-11-26
申请号：US14816591
申请日：2015-08-03
Applicant: SK hynix Inc.
Inventor： Young Suk SEO , Ho Uk SONG , Jun Hyun CHUN , Tae Jin KANG
CPC classification number: G01R31/2644 , G01R31/2607 , G11C7/222 , G11C29/023 , G11C29/028 , G11C29/12015 , G11C29/50012 , H03L1/00 , H03L7/06
Abstract: A semiconductor apparatus includes: an output timing controller configured to delay an applied external read command by a predetermined time and generate a normal output enable flag signal, during a normal mode, a test output timing controller configured to generate a DLL clock signal from an external clock signal, delay the applied external read command in synchronization with the DLL clock signal, and output the delayed applied external read command as a test output enable flag signal, during a test mode, and a multiplexer (MUX) configured to output any one of the normal output enable flag signal or the test output enable flag signal as an output enable flag signal.
Abstract translation: 一种半导体装置，包括：输出定时控制器，被配置为将施加的外部读取命令延迟预定时间，并且在正常模式期间产生正常输出使能标志信号，所述测试输出定时控制器被配置为从外部产生DLL时钟信号 时钟信号，与DLL时钟信号同步地延迟施加的外部读取命令，并且在测试模式期间输出延迟的外部应用外部读取命令作为测试输出使能标志信号，以及多路复用器（MUX），其被配置为输出任何一个 正常输出使能标志信号或测试输出使能标志信号作为输出使能标志信号。
-
公开(公告)号：US20220406367A1
公开(公告)日：2022-12-22
申请号：US17480832
申请日：2021-09-21
Applicant: SK hynix Inc.
Inventor： Hyun Seung KIM , Ho Uk SONG , Tae Kyun SHIN , Min Jun CHOI , Duck Hwa HONG
IPC: G11C11/406 , G11C11/4076
Abstract: An electronic device includes an intelligent refresh control circuit generating an intelligent refresh pulse with a pulse that has a generation period that is adjusted based on the number of generations of an auto refresh signal during an intelligent refresh operation, and an internal refresh signal generation circuit outputting one of a self-refresh pulse including a pulse that is periodically generated by an enable signal during a self-refresh operation and the intelligent refresh pulse as an internal refresh signal.
-
公开(公告)号：US20160254034A1
公开(公告)日：2016-09-01
申请号：US14723749
申请日：2015-05-28
Applicant: SK hynix Inc.
Inventor： Ho Uk SONG , A Ram RIM
IPC: G11C5/14
Abstract: An internal voltage generation circuit may include a temperature information generation unit configured to generate a temperature code having a code value corresponding to a temperature. The temperature information generation unit may include a process variation information generation unit configured to generate a process code having a code value corresponding to a process variation. The temperature information generation unit may include a code combination unit configured to generate a combination code in response to a ratio control signal, the temperature code, and the process code. The temperature information generation unit may include an internal voltage generation unit configured to generate an internal voltage having a voltage level corresponding to a code value of the combination code.
Abstract translation: 内部电压产生电路可以包括温度信息生成单元，其被配置为生成具有与温度对应的代码值的温度代码。 温度信息生成单元可以包括处理变化信息生成单元，其被配置为生成具有与处理变化相对应的代码值的处理代码。 温度信息生成单元可以包括代码组合单元，其被配置为响应于比率控制信号，温度代码和处理代码来生成组合代码。 温度信息生成单元可以包括内部电压生成单元，其被配置为生成具有与组合代码的代码值相对应的电压电平的内部电压。
-
公开(公告)号：US20160056716A1
公开(公告)日：2016-02-25
申请号：US14593138
申请日：2015-01-09
Applicant: SK hynix Inc.
Inventor： Ho Uk SONG , A Ram RIM
CPC classification number: H02M3/156 , G01R31/2608 , G01R31/2621 , G01R31/2884 , G01R31/3004 , G01R35/00 , G05F1/00 , H02M1/08 , H02M2001/0048
Abstract: An apparatus for adjusting an internal voltage includes a device characteristic detection circuit which detects a device characteristic, compares the device characteristic with an external clock, and generates a comparison signal, and an internal voltage adjustment circuit which receives an adjustment code generated based on the comparison signal, adjusts a level of an internal voltage, and generates a level-adjusted internal voltage.
Abstract translation: 用于调整内部电压的装置包括检测器件特性的器件特性检测电路，将器件特性与外部时钟进行比较并产生比较信号;以及内部电压调整电路，其接收基于比较产生的调整代码 信号，调节内部电压的电平，并产生电平调节的内部电压。
-
公开(公告)号：US20150348611A1
公开(公告)日：2015-12-03
申请号：US14501968
申请日：2014-09-30
Applicant: SK hynix Inc.
Inventor： A Ram RIM , Ho Uk SONG
IPC: G11C11/4074 , G11C11/406
CPC classification number: G11C11/4074 , G11C7/04 , G11C7/08 , G11C11/40626 , G11C11/4091
Abstract: A semiconductor memory device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, the first power control signal having an enablement period that may be controlled in response to a temperature signal having a cycle time. The cycle time may be controlled according to a mode signal and an internal temperature. The sense amplifier circuit may generate a first power signal driven to have a first drive voltage in response to the first power control signal. In addition, the sense amplifier circuit may sense and amplify a level of a bit line using the first power signal as a power supply voltage.
Abstract translation: 半导体存储器件可以包括功率控制信号发生器和读出放大器电路。 功率控制信号发生器可以产生第一功率控制信号，第一功率控制信号具有可响应于具有周期时间的温度信号来控制的启动周期。 循环时间可以根据模式信号和内部温度来控制。 感测放大器电路可以产生被驱动以响应于第一功率控制信号而具有第一驱动电压的第一功率信号。 此外，读出放大器电路可以使用第一功率信号作为电源电压来感测和放大位线的电平。
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.014 seconds)
