公开(公告)号：US10734951B2

公开(公告)日：2020-08-04

申请号：US15945642

申请日：2018-04-04

Applicant: SK hynix Inc. ,  NORTHEASTERN UNIVERSITY

Inventor： Hae Kang Jung ,  Yong Suk Choi ,  Yong Bin Kim ,  Gyunam Jeon ,  Dae-Han Kwon ,  Joo Hwan Cho

IPC: H03F3/45 ,  H03F1/02 ,  H03F3/19 ,  H03G3/30 ,  H04B1/16 ,  H03K3/356

Abstract: A receiver circuit receives a signal from a semiconductor device. The receiver circuit includes an input buffer including a first plurality of transistors, the input buffer being configured to detect a fabrication condition of the receiver circuit, generate a control signal according to the detected fabrication condition, and control a gain of an input signal by adjusting a number of operating transistors among the first plurality of transistors in response to the control signal; and a latch circuit configured to latch an output signal of the input buffer, and adjust threshold voltages of a second plurality of transistors in response to a test signal.

公开(公告)号：US09128511B2

公开(公告)日：2015-09-08

申请号：US13709991

申请日：2012-12-10

Applicant: SK hynix Inc.

Inventor： Hae-Rang Choi ,  Yong-Ju Kim ,  Dae-Han Kwon ,  Jae-Min Jang

IPC: G06F3/00 ,  G11C7/22 ,  G11C7/10 ,  G11C11/4076 ,  G11C11/4093 ,  G11C11/4096

CPC classification number: G06F3/00 ,  G11C7/1012 ,  G11C7/1066 ,  G11C7/109 ,  G11C7/1093 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4093 ,  G11C11/4096

Abstract: A semiconductor device includes a characteristic code storage unit configured to store signal transfer characteristic information input through a given pad and output a control code corresponding to the signal transfer characteristic information, and a characteristic reflection unit configured to reflect the signal transfer characteristic information in an input signal input through the given pad, in response to the control code, and to output the reflected input signal.

Abstract translation: 半导体器件包括：特征码存储单元，被配置为存储通过给定焊盘输入的信号传送特性信息，并输出与信号传送特性信息相对应的控制代码;以及特性反射单元，被配置为将信号传送特性信息反映在输入 响应于控制代码通过给定焊盘的信号输入，并输出反射的输入信号。

公开(公告)号：US10256823B2

公开(公告)日：2019-04-09

申请号：US16106658

申请日：2018-08-21

Applicant: SK hynix Inc.

Inventor： Hae-Rang Choi ,  Yong-Ju Kim ,  Dae-Han Kwon ,  Shin-Deok Kang

IPC: H03D3/24 ,  H03K23/66 ,  G06F1/04

Abstract: A clock generation circuit includes a clock generation unit suitable for generating a first clock, a first inversion clock having an opposite phase to the first clock, a second clock having a different phase from the first clock, and a second inversion clock having an opposite phase to the second clock; and a reset control unit suitable for comparing the phases of the first and second clocks, and controlling the clock generation unit to disable for a time and then enable the second clock and the second inversion clock when the second clock leads the first clock.

公开(公告)号：US09225346B2

公开(公告)日：2015-12-29

申请号：US14159193

申请日：2014-01-20

Applicant: SK hynix Inc.

Inventor： Dae-Han Kwon ,  Yong-Ju Kim ,  Taek-Sang Song

IPC: H03L7/06 ,  H03K5/00 ,  H03L7/093 ,  H03L7/081 ,  H03L7/23

CPC classification number: H03L7/093 ,  H03L7/0812 ,  H03L7/235

Abstract: A filtering circuit includes a clock selection unit configured to transfer a first clock or a second clock having a frequency lower than the first clock as an operating clock in response to a frequence signal, and a filter configured to filter an input signal and generate a filtered signal in synchronization with the operating clock.

Abstract translation: 滤波电路包括时钟选择单元，其被配置为响应于频率信号将具有低于第一时钟的频率的第一时钟或第二时钟作为工作时钟传送;以及滤波器，被配置为滤波输入信号并生成滤波的 信号与操作时钟同步。

公开(公告)号：US10079606B2

公开(公告)日：2018-09-18

申请号：US14793451

申请日：2015-07-07

Applicant: SK hynix Inc.

Inventor： Hae-Rang Choi ,  Yong-Ju Kim ,  Dae-Han Kwon ,  Shin-Deok Kang

IPC: H03D3/24 ,  H03K23/66 ,  G06F1/04

CPC classification number: H03K23/662 ,  G06F1/04

Abstract: A clock generation circuit includes a clock generation unit suitable for generating a first clock, a first inversion clock having an opposite phase to the first clock, a second clock having a different phase from the first clock, and a second inversion clock having an opposite phase to the second clock; and a reset control unit suitable for comparing the phases of the first and second clocks, and controlling the clock generation unit to disable for a time and then enable the second clock and the second inversion clock when the second clock leads the first clock.

公开(公告)号：US09361969B2

公开(公告)日：2016-06-07

申请号：US14278031

申请日：2014-05-15

Applicant: SK hynix Inc.

Inventor： Yong-Ju Kim ,  Dae-Han Kwon ,  Hae-Rang Choi ,  Jae-Min Jang

IPC: G11C7/04 ,  G11C11/406

CPC classification number: G11C11/40626

Abstract: A semiconductor device includes a periodic signal generating circuit for generating a periodic signal having a set period regardless of changes in temperature in response to a first trimming signal as a default value and controlling the set period of the periodic signal based on the temperature in response to a second trimming signal, and an internal circuit to perform a set operation in response to the periodic signal.

Abstract translation: 一种半导体器件包括周期性信号发生电路，用于响应于作为默认值的第一微调信号产生具有设定周期而不管温度变化的周期信号，并且响应于该温度控制周期信号的设定周期 第二微调信号和内部电路，以响应周期信号执行设定操作。