公开(公告)号：US20190056884A1

公开(公告)日：2019-02-21

申请号：US15768597

申请日：2016-07-27

Applicant: SONY CORPORATION

Inventor： KEN ISHII ,  HIROYUKI IWAKI ,  KENICHI NAKANISHI ,  YASUSHI FUJINAMI ,  TATSUO SHINBASHI

IPC: G06F3/06

Abstract: The write time is to be shortened in a storage device using memories that require different write times from each other, such as nonvolatile memories.In a memory controller including a plurality of write request holding units and a selection unit, the write request holding units holds a write request with respect to each of a plurality of memory modules that require different write times from one another. The selection unit selects one of the plurality of write request holding units in accordance with memory state information indicating whether each of the plurality of memory modules is in a busy state, and causes outputting of the write request.

公开(公告)号：US20170147433A1

公开(公告)日：2017-05-25

申请号：US15323574

申请日：2015-05-20

Applicant: SONY CORPORATION

Inventor： TATSUO SHINBASHI ,  LUI SAKAI ,  RYOJI IKEGAYA

IPC: G06F11/10 ,  G11C29/52

CPC classification number: G06F11/1068 ,  G06F11/1012 ,  G06F12/16 ,  G11C29/52 ,  G11C2029/0411

Abstract: A utilization efficiency of a memory is improved. A codeword generation unit generates a codeword in an error detection and correction code from data to be encoded. A write control unit writes one of data obtained by inverting the codeword and the codeword into the memory cell as write data. A read data error correction unit reads out the write data from the memory cell as read data, and corrects an error in the read data. An inversion data error correction unit corrects an error in inversion data obtained by inverting the read data. A correction data output unit, when the number of errors of either only one of the read data and the inversion data does not exceed an error correction capability of the error detection and correction code, selects and outputs the one where the error is corrected as correction data.

公开(公告)号：US20200310681A1

公开(公告)日：2020-10-01

申请号：US16311100

申请日：2017-04-17

Applicant: SONY CORPORATION

Inventor： KEN ISHII ,  HIROYUKI IWAKI ,  KENICHI NAKANISHI ,  YASUSHI FUJINAMI ,  TATSUO SHINBASHI

IPC: G06F3/06 ,  G06F11/10

Abstract: The order of read access to a memory is appropriately determined. A memory system includes a plurality of memories and a memory controller. The memory controller includes a memory write control unit and a memory read control unit. The memory write control unit generates a write request for any one of the plurality of memories on the basis of a write command from a computer. The memory read control unit generates a read request for any one of the plurality of memories according to priority corresponding to a data processing state of write data related to the write request in the memory write control unit on the basis of a read command from the computer.

公开(公告)号：US20170255502A1

公开(公告)日：2017-09-07

申请号：US15505674

申请日：2015-07-09

Applicant: SONY CORPORATION

Inventor： YASUSHI FUJINAMI ,  KENICHI NAKANISHI ,  TSUNENORI SHIIMOTO ,  TETSUYA YAMAMOTO ,  TATSUO SHINBASHI ,  HIDEAKI OKUBO ,  HARUHIKO TERADA ,  KEN ISHII ,  HIROYUKI IWAKI ,  MATATOSHI HONJO

IPC: G06F11/07

CPC classification number: G06F11/076 ,  G06F11/0727 ,  G06F11/079 ,  G06F11/1048 ,  G06F12/16 ,  G11C11/16 ,  G11C13/00 ,  G11C29/00 ,  G11C29/44 ,  G11C2029/0407

Abstract: Detecting a defective cell in a memory in consideration of an error property difference depending on the storage state. A determination unit determines whether there is a possibility of defect for each of unit-of-storages on a memory cell formed with a non-volatile memory. The non-volatile memory undergoes either a reset operation that transitions a state from a low resistive state (LRS) to a high resistive state (HRS) or a set operation that transitions the state from the high resistive state to the low resistive state. The determination unit determines a unit-of-storage in which the number of errors in predetermined one of the reset operation and the set operation has exceeded a predetermined standard, as a unit-of-storage suspected of having a defect.