公开(公告)号：US20150001729A1

公开(公告)日：2015-01-01

申请号：US13929485

申请日：2013-06-27

Applicant: STATS ChipPAC, Ltd.

Inventor： Hoang Lan ,  Wang Zhenliang

IPC: H01L23/31 ,  H01L21/56

CPC classification number: H01L21/563 ,  H01L23/13 ,  H01L23/16 ,  H01L23/18 ,  H01L23/31 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0655 ,  H01L31/0203 ,  H01L31/0216 ,  H01L33/483 ,  H01L33/486 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/94 ,  H01L2924/15151 ,  H01L2924/15313 ,  H01L2224/03

Abstract: A semiconductor device has a substrate including an opening. A trench is formed over the substrate around the opening. An interconnect structure is formed in the trench. An underfill material is disposed over the interconnect structure. A first semiconductor die is disposed over the underfill material prior to curing the underfill material. An active region of the first semiconductor die is disposed over the opening in the substrate. The trench contains the outward flow of underfill material. Underfill material is blocked from flowing over unintended areas on the surface of substrate, into the opening in the substrate, and over sensors of the first semiconductor die. A second semiconductor die is disposed over the substrate. The trench is formed by a first and second dam or a first insulating layer. A second insulating layer is formed over the first insulating layer. A dam is formed over the second insulating layer.

Abstract translation: 半导体器件具有包括开口的基板。 在开口周围的衬底上形成沟槽。 在沟槽中形成互连结构。 底部填充材料设置在互连结构上。 在固化底部填充材料之前，将第一半导体管芯设置在底部填充材料上方。 第一半导体管芯的有源区域设置在衬底的开口上方。 沟槽包含底部填充材料的向外流动。 底部填充材料被阻止流过基板表面上的非预期区域，进入基板中的开口，以及超过第一半导体管芯的传感器。 第二半导体管芯设置在衬底上。 沟槽由第一和第二坝或第一绝缘层形成。 在第一绝缘层上形成第二绝缘层。 在第二绝缘层上形成坝。

公开(公告)号：US09627229B2

公开(公告)日：2017-04-18

申请号：US13929485

申请日：2013-06-27

Applicant: STATS ChipPAC, Ltd.

Inventor： Hoang Lan ,  Wang Zhenliang

IPC: H01L21/31 ,  H01L21/56 ,  H01L23/16 ,  H01L23/18 ,  H01L23/31 ,  H01L33/48 ,  H01L31/0203 ,  H01L31/0216 ,  H01L23/13 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L21/563 ,  H01L23/13 ,  H01L23/16 ,  H01L23/18 ,  H01L23/31 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0655 ,  H01L31/0203 ,  H01L31/0216 ,  H01L33/483 ,  H01L33/486 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/94 ,  H01L2924/15151 ,  H01L2924/15313 ,  H01L2224/03

Abstract: A semiconductor device has a substrate including an opening. A trench is formed over the substrate around the opening. An interconnect structure is formed in the trench. An underfill material is disposed over the interconnect structure. A first semiconductor die is disposed over the underfill material prior to curing the underfill material. An active region of the first semiconductor die is disposed over the opening in the substrate. The trench contains the outward flow of underfill material. Underfill material is blocked from flowing over unintended areas on the surface of substrate, into the opening in the substrate, and over sensors of the first semiconductor die. A second semiconductor die is disposed over the substrate. The trench is formed by a first and second dam or a first insulating layer. A second insulating layer is formed over the first insulating layer. A dam is formed over the second insulating layer.