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1.发明申请ABSOLUTE ROTATION ESTIMATION INCLUDING OUTLIER DETECTION VIA LOW-RANK AND SPARSE MATRIX DECOMPOSITION 有权绝对旋转估计包括通过低排名和稀疏矩阵分解的外部检测公开(公告)号：US20160163114A1
公开(公告)日：2016-06-09
申请号：US14562394
申请日：2014-12-05
Applicant: STMicroelectronics S.r.l.
Inventor： Federica Arrigoni , Beatrice Rossi , Pasqualina Fragneto
IPC: G06T19/20
CPC classification number: G06T19/20 , G06T2219/2004 , G06T2219/2016
Abstract: The present disclosure is directed to systems and methods to perform absolute rotation estimation including outlier detection via low-rank and sparse matrix decomposition. One example method includes obtaining a relative rotation estimates matrix that includes a plurality of relative rotation estimates. The method includes determining values for a low-rank matrix that result in a desirable value of a cost function that is based on a low-rank and sparse matrix decomposition of the relative rotation estimates matrix. The cost function includes the low-rank matrix and a sparse matrix that is nonzero in correspondence of one or more outliers of the plurality of relative rotation estimates. The method includes determining an absolute rotations matrix that includes a plurality of absolute rotations based at least in part on the values of the low-rank matrix that result in the desirable value of the cost function.
Abstract translation: 本公开涉及用于执行包括通过低阶和稀疏矩阵分解的异常值检测的绝对旋转估计的系统和方法。 一个示例性方法包括获得包括多个相对旋转估计的相对旋转估计矩阵。 该方法包括确定导致基于相对旋转估计矩阵的低秩和稀疏矩阵分解的成本函数的期望值的低阶矩阵的值。 成本函数包括低秩矩阵和对应于多个相对旋转估计中的一个或多个离群值非零的稀疏矩阵。 该方法包括至少部分地基于导致成本函数的期望值的低秩矩阵的值来确定包括多个绝对旋转的绝对旋转矩阵。
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2.发明授权公开(公告)号：US11308406B2
公开(公告)日：2022-04-19
申请号：US15877138
申请日：2018-01-22
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Valentina Arrigoni , Giuseppe Desoli , Beatrice Rossi , Pasqualina Fragneto
Abstract: A method of operating neural networks such as convolutional neural networks including, e.g., an input layer, an output layer and at least one intermediate layer between the input layer and the output layer, with the network layers including operating circuits performing arithmetic operations on input data to provide output data. The method includes: selecting a set of operating circuits in the network layers, performing arithmetic operations in operating circuits in the selected set of operating circuits by performing Residue Number System or RNS operations on RNS-converted input data by obtaining RNS output data in the Residue Number System, backward converting from the Residue Number System the RNS output data resulting from the RNS operations.
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公开(公告)号：US09846974B2
公开(公告)日：2017-12-19
申请号：US14562394
申请日：2014-12-05
Applicant: STMicroelectronics S.r.l.
Inventor： Federica Arrigoni , Beatrice Rossi , Pasqualina Fragneto
IPC: G06T19/20
CPC classification number: G06T19/20 , G06T2219/2004 , G06T2219/2016
Abstract: The present disclosure is directed to systems and methods to perform absolute rotation estimation including outlier detection via low-rank and sparse matrix decomposition. One example method includes obtaining a relative rotation estimates matrix that includes a plurality of relative rotation estimates. The method includes determining values for a low-rank matrix that result in a desirable value of a cost function that is based on a low-rank and sparse matrix decomposition of the relative rotation estimates matrix. The cost function includes the low-rank matrix and a sparse matrix that is nonzero in correspondence of one or more outliers of the plurality of relative rotation estimates. The method includes determining an absolute rotations matrix that includes a plurality of absolute rotations based at least in part on the values of the low-rank matrix that result in the desirable value of the cost function.
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公开(公告)号：US09245200B2
公开(公告)日：2016-01-26
申请号：US14068437
申请日：2013-10-31
Inventor： Luca Magri , Beatrice Rossi , Subarna Tripathi , Pasqualina Fragneto , Emiliano Mario Piccinelli
CPC classification number: G06K9/4604 , G06T7/13 , G06T2207/20061
Abstract: An embodiment is a computer-implemented method for detecting a straight line in a digital image comprising a plurality of pixels comprising the steps: detecting an edge in the digital image, generating a first straight line which passes through a first pixel of the detected edge, generating a second straight line which passes through a second pixel of the detected edge, which is different from the first pixel, determining at least two intersections with a boundary of the digital image for each generated straight line, determining a set of two parameter values for each generated straight line based on the respective determined at least two intersections, wherein the set of two parameter values uniquely determines the respective generated straight line, and detecting the straight line in the digital image based on the determined sets of two parameter values.
Abstract translation: 一个实施例是用于检测包括多个像素的数字图像中的直线的计算机实现的方法，包括以下步骤：检测数字图像中的边缘，生成穿过检测到的边缘的第一像素的第一直线， 产生穿过所检测的边缘的不同于第一像素的第二像素的第二直线，为每个生成的直线确定与数字图像的边界的至少两个交点，确定一组两个参数值，以供 每个生成的直线基于相应确定的至少两个交点，其中所述两个参数值的集合唯一地确定相应生成的直线，并且基于所确定的两个参数值的集合来检测数字图像中的直线。
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Patent Agency Ranking
公开(公告)号：US10595788B2
公开(公告)日：2020-03-24
申请号：US15169184
申请日：2016-05-31
Applicant: STMicroelectronics S.r.l.
Inventor： Beatrice Rossi , Pasqualina Fragneto , Daniele Zambon , Diego Carrera , Giacomo Boracchi
IPC: A61B5/00 , A61B5/0472 , A61B5/0452 , A61B5/0468 , A61B5/11 , A61B5/024 , A61B5/0245 , A61B5/04 , A61B5/0402 , A61B5/0456
Abstract: A heartrate monitor detects heartbeats in a test signal. A local heartrate and an energy of acceleration are associated with the detected heartbeats. Detected heartbeats are included or excluded from a test set of heartbeats based on the local heartrate and energy of acceleration associated with the respective heartbeats. Anomalous heartbeats in the test set of heartbeats are detected using a sparse approximation model. The heartrate monitor may detect heartbeats in a training heartbeat signal. A reference heart rate and an energy of acceleration are associated with detected beats of the training heartbeat signal and selectively included in a set of training data based on the heart rate and energy of acceleration associated with the detected beat in the training heartbeat signal. A dictionary of the sparse representation model may be generated using the set of training data.
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公开(公告)号：US10254338B2
公开(公告)日：2019-04-09
申请号：US15221211
申请日：2016-07-27
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Nicolas Bernard Grossier , Lorenzo Guerrieri , Giuseppe Livio Gobbato , Daniele Zerbini , Martina Cordoni , Pasqualina Fragneto
IPC: G01R31/3177 , G01R31/317 , H04B3/54 , H02J13/00 , H05B37/02 , G06F11/30 , G01R31/28 , G06F11/36 , G06F11/24 , G06F1/26
Abstract: A semiconductor device, for example an integrated circuit such as a microcontroller (MCU) or a digital signal processor (DSP), includes a semiconductor die coupled with a power supply line, a debug module coupled with the semiconductor die to exchange semiconductor die debug command and data signals with the semiconductor die, and a modem coupled with the power supply line. The debug module is arranged to convey the semiconductor die debug command and data signals over the power supply line.
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公开(公告)号：US08812845B2
公开(公告)日：2014-08-19
申请号：US13735876
申请日：2013-01-07
Inventor： Liqun Chen , Keith Harrison , Guido Marco Bertoni , Pasqualina Fragneto , Gerardo Pelosi
CPC classification number: H04L9/08 , H04L9/3073 , H04L9/321 , H04L2209/80 , H04W12/06
Abstract: An authentication method of a first module by a second module includes the steps of generating a first random datum by the second module to be sent to the first module, generating a first number by the first module starting from the first datum and by way of a private key, and generating a second number by the second module to be compared with the first number, so as to authenticate the first module. The step of generating the second number is performed starting from public parameters and is independent of the step of generating the first number.
Abstract translation: 通过第二模块的第一模块的认证方法包括以下步骤：由第二模块生成要发送到第一模块的第一随机数据，由第一模块从第一数据开始生成第一数字，并通过 私钥，并且由第二模块生成与第一号码进行比较的第二号码，以便认证第一模块。 从公共参数开始执行产生第二数量的步骤，并且独立于生成第一个数字的步骤。
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公开(公告)号：US10922807B2
公开(公告)日：2021-02-16
申请号：US16174022
申请日：2018-10-29
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Lidia Moioli , Pasqualina Fragneto , Beatrice Rossi , Diego Carrera , Giacomo Boracchi , Mauro Fumagalli , Elena Tagliabue , Paolo Giugni , Annalisa Aurigemma
IPC: G06T7/00
Abstract: A device includes image generation circuitry and a convolutional neural network. The image generation circuitry, in operation, generates a binned representation of a wafer defect map (WDM). The convolutional-neural-network, in operation, generates and outputs an indication of a root cause of a defect associated with the WDM based on the binned representation of the WDM and a data-driven model associating WDMs with classes of a defined set of classes of wafer defects.
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公开(公告)号：US20170315175A1
公开(公告)日：2017-11-02
申请号：US15221211
申请日：2016-07-27
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Nicolas Bernard GROSSIER , Lorenzo GUERRIERI , Giuseppe Livio GOBBATO , Daniele ZERBINI , Martina CORDONI , Pasqualina Fragneto
IPC: G01R31/317 , G01R31/3177
CPC classification number: G01R31/31713 , G01R31/28 , G01R31/3177 , G06F1/26 , G06F11/24 , G06F11/3024 , G06F11/3062 , G06F11/3636 , G06F11/364 , G06F11/3648 , G06F11/3656 , H02J13/0089 , H02J13/0093 , H02J13/0096 , H04B3/54 , H04B3/542 , H04B2203/5495 , H05B37/0263
Abstract: A semiconductor device, for example an integrated circuit such as a microcontroller (MCU) or a digital signal processor (DSP), includes a semiconductor die coupled with a power supply line, a debug module coupled with the semiconductor die to exchange semiconductor die debug command and data signals with the semiconductor die, and a modem coupled with the power supply line. The debug module is arranged to convey the semiconductor die debug command and data signals over the power supply line.
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