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公开(公告)号：US20240275350A1
公开(公告)日：2024-08-15
申请号：US18433906
申请日：2024-02-06
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Yoshiyuki SUGIMOTO , Keiji TANAKA , Hiroshi UEMURA
CPC classification number: H03G3/30 , H03F3/45282 , H03G2201/103
Abstract: A variable gain amplifier circuit includes a main circuit including a differential current circuit, a current divider circuit connected to a high potential side of the differential current circuit, and a load circuit connected to a high potential side of the current divider circuit, the main circuit being configured to generate differential output voltage signals by the load circuit in accordance with either differential input voltage signals or first differential current signals; and a gain adjustment circuit configured to adjust a gain of the main circuit. The gain adjustment circuit includes a generation circuit configured to generate a first control voltage and a second control voltage in accordance with a setting signal, and a limit circuit configured to limit, by detecting an amplitude of the differential output voltage signals, the voltage difference to a limit value or greater so that the amplitude does not become lower than a setting voltage.
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公开(公告)号：US20240085648A1
公开(公告)日：2024-03-14
申请号：US18461773
申请日：2023-09-06
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA
IPC: G02B6/42
CPC classification number: G02B6/4269 , G02B6/4251 , G02B6/4259 , G02B6/428
Abstract: An optical module according to the present disclosure includes a glass substrate having a first surface, a second surface opposite to the first surface, and a via hole connecting the first surface and the second surface each other; an optical element mounted on the first surface of the glass substrate and joined to the via hole of the glass substrate, the optical element being configured to consume an electricity and perform at least one of an input and an output of an optical signal; a temperature control element mounted on the second surface of the glass substrate and joined to the via hole of the glass substrate, the temperature control element being configured to regulate a temperature of the optical element; and a first housing attached to the first surface, the first housing being configured to hermetically seal the optical element.
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公开(公告)号：US20220158448A1
公开(公告)日：2022-05-19
申请号：US17528861
申请日：2021-11-17
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji TANAKA
Abstract: An electrostatic protection circuit includes first and second output terminals, a first diode circuit connected between the first output terminal and a first node, a second diode circuit connected between the second output terminal and the first node, a first intermediate voltage circuit that is connected between the first output terminal and the second output terminal and that is configured to generate, at a second node different from the first node, a first intermediate voltage having an intermediate voltage value between a voltage value of the first output terminal and a voltage value of the second output terminal, a detection circuit configured to generate a trigger signal in accordance with the first intermediate voltage, and a switch circuit configured to electrically connect the first node to a ground line in accordance with the trigger signal.
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公开(公告)号：US20250023523A1
公开(公告)日：2025-01-16
申请号：US18762755
申请日：2024-07-03
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji Tanaka
IPC: H03F1/42
Abstract: A peaking adjustment circuit according to the present disclosure includes an amplifier circuit including a first node to which a first input signal is input and a second node as an output node, an adjustment circuit including a third node as an output node, a first inductor connected between the second node and the third node, and a first series circuit connected between the third node and a ground wiring and having a first capacitor and a first variable resistance element connected in series with each other, and a follower circuit including a fourth node as an output node, and a first source follower circuit connected between the third node and the fourth node, and the first variable resistance element has a first resistance value that changes according to a first setting signal.
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公开(公告)号：US20240332273A1
公开(公告)日：2024-10-03
申请号：US18609318
申请日：2024-03-19
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji TANAKA , Seiji KUMAGAI
CPC classification number: H01L25/167 , G02F1/0102 , G02F1/212 , H01L23/49838 , H01L23/4985 , H01L24/16 , H01L24/17 , H10N19/00 , G02F1/218 , G02F2202/102 , H01L24/49 , H01L24/73 , H01L2224/17155 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/49175 , H01L2224/73207 , H01L2924/1426
Abstract: An optical module according to one embodiment includes: a package having a first surface and a second surface; a driver IC mounted on the first surface via a heat sink block; an optical circuit element mounted on the second surface via a temperature adjustment element; and a flexible substrate mounted on the driver IC and the optical circuit element, and electrically connected to the driver IC and the optical circuit element. The flexible substrate includes a main body extending in a first direction and a second direction intersecting the first direction, and a wiring formed on the main body. The main body includes a first end facing an optical circuit element. The wiring includes a first lead portion protruding from the first end to an outside of the main body along the first direction. The first lead portion is connected to the optical circuit element.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20220149826A1
公开(公告)日：2022-05-12
申请号：US17522582
申请日：2021-11-09
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji TANAKA
IPC: H03K5/02 , H03K17/687 , H04B10/50
Abstract: An amplitude modulation circuit includes: first, second, and third input terminals; first and second output terminals; a current source; first and second transistors including a base electrically connected to the first and second input terminals, a collector electrically connected to the first and second output terminals, and an emitter electrically connected to a grounding terminal via the current source; first and second resistive elements electrically connected between the first and second output terminals and a power line; and a first MOS transistor including a drain connected to the first output terminal, a source connected to the second output terminal, and a gate connected to the third input terminal. The MOS transistor is configured to operate in a non-saturated region, and a resistance between the source and the drain of the MOS transistor is larger than resistances of the first and second resistive elements.
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公开(公告)号：US20230258698A1
公开(公告)日：2023-08-17
申请号：US18108748
申请日：2023-02-13
Applicant: Sumitomo Electric Industries, Ltd.
Inventor： Hiroshi UEMURA , Keiji TANAKA
Abstract: An output circuit includes: an inductor, an amplifier circuit that outputs an output signal via the inductor, an output terminal that outputs the output signal to an outside, a voltage divider circuit including a series circuit constituted by a first capacitive element and a second capacitive element connected in series to the first capacitive element, the series circuit generating a first voltage-divided signal by dividing a voltage of the output signal, a first band-adjusting element having a resistance component for generating a first band-adjusted signal by adjusting frequency characteristics of the first voltage-divided signal, and a first peak detection circuit that detects a peak voltage of the first band-adjusted signal and output a first peak voltage in accordance with the detected peak voltage.
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公开(公告)号：US20220158447A1
公开(公告)日：2022-05-19
申请号：US17528706
申请日：2021-11-17
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji TANAKA
IPC: H02H9/04 , H02H1/00 , H03K17/082
Abstract: An electrostatic protection circuit includes first and second output terminals, a first diode circuit connected between the first output terminal and a common node, a second diode circuit connected between the second output terminal and the common node, an intermediate voltage circuit that is connected between the first output terminal and the second output terminal and that is configured to generate, at the common node, an intermediate voltage having an intermediate voltage value between a voltage value of the first output terminal and a voltage value of the second output terminal, and a clamp circuit configured to electrically connect the common node to a ground line in accordance with the intermediate voltage.
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公开(公告)号：US20220149790A1
公开(公告)日：2022-05-12
申请号：US17522525
申请日：2021-11-09
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji TANAKA
Abstract: A variable gain amplifier circuit includes first and second input terminals, first and second output terminals, first and second transistors respectively having bases electrically connected to the first and second input terminals and having collectors electrically connected to the first and second output terminals, and a degeneration circuit connected between emitters of the first and second transistors. The degeneration circuit has first and second MOS transistors each having two current terminals connected in series between the emitters of the first and second transistors, series resistor circuits, first and second current sources, two resistive elements connected between the first and second current sources and gates of the first and second MOS transistors, and two resistive elements connected between the first and second current sources and two nodes of the series resistor circuits.
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公开(公告)号：US20240329319A1
公开(公告)日：2024-10-03
申请号：US18611993
申请日：2024-03-21
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Hiroshi UEMURA , Keiji TANAKA
IPC: G02B6/30
CPC classification number: G02B6/30
Abstract: An optical module according to one embodiment includes a substrate made of glass and having a first surface, a second surface opposite to the first surface, a via penetrating between the first surface and the second surface, and a first waveguide provided between the first surface and the second surface; an optical element that is mounted on the first surface, and that inputs and outputs an optical signal; a thermally conductive member mounted on the second surface and thermally connected to the optical element through the via; and a second waveguide provided on the first surface. The optical signal is input to and output from an outside through the second waveguide and the first waveguide.
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