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公开(公告)号:US20240065073A1
公开(公告)日:2024-02-22
申请号:US18201982
申请日:2023-05-25
Inventor: TAESANG KIM , Hyun Jae KIM , Hyukjoon YOO , JUN HYUNG LIM
IPC: H10K59/65 , H01L31/0224 , H01L31/032 , H01L31/113 , H01L31/18
CPC classification number: H10K59/65 , H01L31/022466 , H01L31/032 , H01L31/1136 , H01L31/18 , G06V40/1318
Abstract: A phototransistor includes a gate electrode, a semiconductor layer disposed on the gate electrode, a gate insulating layer disposed between the gate electrode and the semiconductor layer, a source electrode, a drain electrode, and a porous layer disposed on the source electrode, the semiconductor layer, and the drain electrode, where a plurality of holes is defined in the porous layer.
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公开(公告)号:US20220310948A1
公开(公告)日:2022-09-29
申请号:US17537993
申请日:2021-11-30
Inventor: JUN HYUNG LIM , Yong-Young Noh , SOYOUNG KOO , HYUNGJUN KIM , Huihui Zhu
Abstract: A thin film transistor includes a gate electrode, an insulating layer disposed on the gate electrode, and an active layer disposed on the insulating layer, where the active layer includes a perovskite compound represented by the following Formula: AB(1-u)C(u)[X(1-v)Y(v)]3, where A is a monovalent organic cation, a monovalent inorganic cation, or any combination thereof, B is Sn2+, C is a divalent cation or trivalent cation, X is a monovalent anion, Y is a monovalent anion different from X, u is a real number greater than 0 and less than 1, and v is a real number greater than 0 and less than 1.
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公开(公告)号:US20210343817A1
公开(公告)日:2021-11-04
申请号:US17244857
申请日:2021-04-29
Inventor: JUN HYUNG LIM , HYUNGJUN KIM , HYUNGJUN KIM , YOUNG JUN KIM , JU SANG PARK , WHANG JE WOO
Abstract: A method may be used for manufacturing a semiconductor element. The method may include the following steps: preparing a substrate; forming a semiconductor layer on the substrate, wherein the semiconductor layer includes crystallized two-dimensional layers; forming a source electrode and a drain electrode on the semiconductor layer; forming an semiconductor member by wet etching the semiconductor layer using sodium hypochlorite as an etchant, wherein the wet etching results in a residue; and removing the residue using purified water and an inert gas.
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公开(公告)号:US20240258436A1
公开(公告)日:2024-08-01
申请号:US18380678
申请日:2023-10-17
Applicant: Samsung Display Co., Ltd.
Inventor: SOYOUNG KOO , TAEWOOK KANG , Hyoung Do Kim , HYUNGJUN KIM , YUNYONG NAM , JUN HYUNG LIM , Ki-Lim Han
IPC: H01L29/786 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78696 , H01L29/42384 , H01L29/66742 , H01L29/7869
Abstract: A display device includes: a buffer layer including an inorganic insulating material, an active pattern disposed on the buffer layer and including a channel region and a first conductor region adjacent to the channel region, a gate insulating layer disposed on the buffer layer and the active pattern and including an inorganic insulating material, a gate electrode layer including a first electrode extending along a side surface of the gate insulating layer and including a first contact portion electrically contacting the first conductor region, and an oxygen supply layer including a first pattern disposed between the first electrode and the gate insulating layer, wherein the first pattern includes a first groove recessed from a side surface of to surround at least a part of the first contact portion in a plan view.
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公开(公告)号:US20240079420A1
公开(公告)日:2024-03-07
申请号:US18226986
申请日:2023-07-27
Applicant: Samsung Display Co., LTD.
Inventor: KEUNWOO KIM , TAEWOOK KANG , DOO-NA KIM , HANBIT KIM , JIYEONG SHIN , JUN HYUNG LIM
IPC: H01L27/12 , G09G3/3233 , H01L29/40 , H01L29/66 , H01L29/786
CPC classification number: H01L27/1296 , G09G3/3233 , H01L27/1222 , H01L27/1237 , H01L29/408 , H01L29/66757 , H01L29/78675 , G09G2300/0819 , G09G2300/0842
Abstract: A display device includes a transistor including an active layer including first and second active areas, where the first active area includes a first drain area, a source area, and a first channel area between the source area and the first drain area, and the second active area includes the source area, a second drain area, and a second channel area between the source area and the second drain area, a gate insulating layer on the active layer, first and second charge layers at an interface between the first channel area and the gate insulating layer and at an interface between the second channel area and the gate insulating layer, where the first charge layer is adjacent to the source area, and the second charge layer is adjacent to the first and second drain areas and has a charge opposite to a charge of a first charge layer.
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公开(公告)号:US20240014325A1
公开(公告)日:2024-01-11
申请号:US18138122
申请日:2023-04-24
Inventor: SEUNGJUN LEE , SANG SIG KIM , JUN HYUNG LIM , KYOUNG AH CHO , HEE SUNG KONG
IPC: H01L29/786
CPC classification number: H01L29/78648 , H01L29/7869
Abstract: A transistor is disclosed that includes an active layer and a gate electrode. The active layer includes a first conductor layer including metal atoms, a layer of semiconductor material disposed above the first conductor layer, and a second conductor layer disposed above the semiconductor material layer and including the metal atoms. The gate electrode overlaps a part of the active layer and is electrically insulated from the active layer.
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公开(公告)号:US20230189566A1
公开(公告)日:2023-06-15
申请号:US18079115
申请日:2022-12-12
Applicant: Samsung Display Co., Ltd.
Inventor: SANGWOO SOHN , YEON KEON MOON , EUN HYUN KIM , SEUNGHO YANG , JUN HYUNG LIM , Hyunjun JEONG
IPC: H10K59/121 , H10K59/12 , H10K71/00 , H01L29/786
CPC classification number: H10K59/1213 , H10K59/1201 , H10K71/00 , H01L29/7869
Abstract: A display device includes insulating layers, a light-emitting element, and a pixel circuit electrically connected to the light-emitting element. The pixel circuit includes a first transistor. The first transistor includes a metal oxide semiconductor pattern including a source region, a drain region and a channel region disposed between the source region and the drain region, a first gate disposed on the metal oxide semiconductor pattern and overlapping the channel region in a plan view, and a metal oxide pattern disposed on the first gate.
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公开(公告)号:US20220173191A1
公开(公告)日:2022-06-02
申请号:US17494892
申请日:2021-10-06
Applicant: Samsung Display Co., Ltd.
Inventor: MYEONGHO KIM , YEONHONG KIM , JAYBUM KIM , KYOUNG SEOK SON , SUNHEE LEE , SEUNGJUN LEE , SEUNGHUN LEE , JUN HYUNG LIM
Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.
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公开(公告)号:US20220123075A1
公开(公告)日:2022-04-21
申请号:US17358518
申请日:2021-06-25
Applicant: Samsung Display Co., Ltd.
Inventor: EUN HYUN KIM , JAYBUM KIM , KYOUNG SEOK SON , SUNHEE LEE , JUN HYUNG LIM
Abstract: A display device includes a display area and a functional area defining a through-portion therein. At least a portion of the functional area is surrounded by the display area. The display device includes an insulation layer disposed on a base substrate and defining a disconnection portion in the functional area, a pixel array disposed on the base substrate in the display area, and a mask pattern including a metal oxide and extending along the disconnection portion in a plan view.
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公开(公告)号:US20220077267A1
公开(公告)日:2022-03-10
申请号:US17318350
申请日:2021-05-12
Applicant: Samsung Display Co., Ltd.
Inventor: HYUNGJUN KIM , SOYOUNG KOO , EOK SU KIM , YUNYONG NAM , JUN HYUNG LIM , KYUNGJIN JEON
Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.
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