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公开(公告)号：US09508857B2
公开(公告)日：2016-11-29
申请号：US14635732
申请日：2015-03-02
Inventor： Byung Du Ahn , Ji Hun Lim , Jun Hyung Lim , Dae Hwan Kim , Jae Hyeong Kim , Je Hun Lee , Hyun Kwang Jung
IPC: H01L29/786 , H01L27/12 , H01L21/28
CPC classification number: H01L29/78606 , H01L21/28 , H01L27/124 , H01L29/786 , H01L29/78678 , H01L29/7869 , H01L29/78696
Abstract: A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.
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公开(公告)号：US20150348494A1
公开(公告)日：2015-12-03
申请号：US14715490
申请日：2015-05-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Ji Hun Lim , Hyun Jae Na , Dong Hwan Shim , Byung Du Ahn
CPC classification number: G09G3/3648 , G09G2330/021 , G09G2360/144 , H01L31/022466
Abstract: A display device includes a first pixel coupled to a first scan line and a first data line. The first pixel includes a switching transistor including a control terminal connected to the first scan line and an input terminal connected to the first data line, and is turned on by an on-scan signal, a first transistor including a first control terminal connected to the first scan line, a first input terminal connected to the first data line, and a first output terminal connected to the first control terminal; and a second transistor including a second control terminal connected to the first output terminal, a second input terminal receiving a base voltage, and a second output terminal connected to the second control terminal. The first and second transistors respectively convert light into first and second currents outputted respectively to the first and second output terminals in response to an off-scan signal.
Abstract translation: 显示装置包括耦合到第一扫描线和第一数据线的第一像素。 第一像素包括开关晶体管，其包括连接到第一扫描线的控制端子和连接到第一数据线的输入端子，并由接通扫描信号导通;第一晶体管，包括连接到第一扫描线的第一控制端子 第一扫描线，连接到第一数据线的第一输入端和连接到第一控制端的第一输出端; 以及第二晶体管，包括连接到第一输出端子的第二控制端子，接收基极电压的第二输入端子和连接到第二控制端子的第二输出端子。 第一和第二晶体管响应于截止扫描信号分别将光转换成分别输出到第一和第二输出端的第一和第二电流。
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公开(公告)号：US20160300526A1
公开(公告)日：2016-10-13
申请号：US14926922
申请日：2015-10-29
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Ji Hun Lim , Yeon Keon Moon , Masataka Kano , Jun Hyung Lim
CPC classification number: G09G3/3233 , G09G2300/0842 , G09G2320/043
Abstract: A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.
Abstract translation: 显示装置包括：多个像素，其中所述多个像素中的每一个包括至少两个包括第一栅电极和第二栅电极的双栅晶体管; 所述至少两个双栅极晶体管的源电极和漏电极之间的导通由施加到所述第一栅电极的电压以及所述至少两个双栅极晶体管中的每一个的所述第二栅电极和所述第一栅电极之间的电连接来控制， 取决于对至少两个双栅极晶体管中的每一个平均施加的电压的极性来确定栅极晶体管。
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公开(公告)号：US09142682B2
公开(公告)日：2015-09-22
申请号：US13826905
申请日：2013-03-14
Applicant: Samsung Display Co., Ltd.
Inventor： Je Hun Lee , Ji Hun Lim , Jun Ho Song
IPC: H01L29/786 , H01L29/66
CPC classification number: H01L29/7869 , H01L29/66969 , H01L29/78696
Abstract: A thin film transistor and a manufacturing method thereof. The thin film transistor includes: a gate electrode; a gate insulating layer disposed on the gate electrode; a first semiconductor disposed on the gate insulating layer; a second semiconductor disposed on the first semiconductor and having a different plane shape from the first semiconductor; and a source electrode and a drain electrode that are disposed on the second semiconductor and face each other.
Abstract translation: 一种薄膜晶体管及其制造方法。 薄膜晶体管包括：栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的第一半导体; 设置在所述第一半导体上并且具有与所述第一半导体不同的平面形状的第二半导体; 以及设置在第二半导体上并且彼此面对的源电极和漏电极。
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公开(公告)号：US09991287B2
公开(公告)日：2018-06-05
申请号：US15478386
申请日：2017-04-04
Applicant: Samsung Display Co., Ltd.
Inventor： Ji Hun Lim , Jong Baek Seon , Kyoung Seok Son , Eok Su Kim , Tae Sang Kim
IPC: H01L29/78 , H01L29/66 , H01L27/12 , H01L29/786
CPC classification number: H01L27/1225 , H01L27/124 , H01L27/1259 , H01L29/66969 , H01L29/78633 , H01L29/7869
Abstract: A thin film transistor array panel includes: a substrate; a semiconductor layer disposed on the substrate; a gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer to not overlap the gate electrode, wherein a first edge of the gate electrode is aligned with a second edge of the semiconductor layer in a direction that is perpendicular to the substrate.
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Patent Agency Ranking
公开(公告)号：US09548034B2
公开(公告)日：2017-01-17
申请号：US14715490
申请日：2015-05-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Ji Hun Lim , Hyun Jae Na , Dong Hwan Shim , Byung Du Ahn
IPC: G09G3/36 , H01L31/0224
CPC classification number: G09G3/3648 , G09G2330/021 , G09G2360/144 , H01L31/022466
Abstract: A display device includes a first pixel coupled to a first scan line and a first data line. The first pixel includes a switching transistor including a control terminal connected to the first scan line and an input terminal connected to the first data line, and is turned on by an on-scan signal, a first transistor including a first control terminal connected to the first scan line, a first input terminal connected to the first data line, and a first output terminal connected to the first control terminal; and a second transistor including a second control terminal connected to the first output terminal, a second input terminal receiving a base voltage, and a second output terminal connected to the second control terminal. The first and second transistors respectively convert light into first and second currents outputted respectively to the first and second output terminals in response to an off-scan signal.
Abstract translation: 显示装置包括耦合到第一扫描线和第一数据线的第一像素。 第一像素包括开关晶体管，其包括连接到第一扫描线的控制端子和连接到第一数据线的输入端子，并由接通扫描信号导通;第一晶体管，包括连接到第一扫描线的第一控制端子 第一扫描线，连接到第一数据线的第一输入端和连接到第一控制端的第一输出端; 以及第二晶体管，包括连接到第一输出端子的第二控制端子，接收基极电压的第二输入端子和连接到第二控制端子的第二输出端子。 第一和第二晶体管响应于截止扫描信号分别将光转换成分别输出到第一和第二输出端的第一和第二电流。
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公开(公告)号：US09543336B2
公开(公告)日：2017-01-10
申请号：US14963769
申请日：2015-12-09
Applicant: Samsung Display Co., Ltd.
Inventor： Masataka Kano , Ji Hun Lim , Yeon Keon Moon , Jun Hyung Lim , So Young Koo , Myoung Hwa Kim
IPC: H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036 , H01L27/12 , H01L29/417 , H01L29/423 , H01L29/786 , H01L29/66 , H01L29/788
CPC classification number: H01L27/1248 , H01L27/124 , H01L27/1259 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/78606 , H01L29/78648 , H01L29/7869 , H01L29/788
Abstract: A thin-film transistor array panel includes a substrate, a first gate electrode disposed on the substrate, a first self-assembled monolayer disposed on the first gate electrode, a gate insulating layer disposed on the first self-assembled monolayer, a semiconductor disposed on the gate insulating layer, a drain electrode overlapping the semiconductor, the drain electrode being separated from and facing a source electrode with respect to the semiconductor, a first interlayer insulating layer disposed on the source electrode and the drain electrode, a second self-assembled monolayer disposed on the first interlayer insulating layer, a second gate electrode disposed on the second self-assembled monolayer, a second interlayer insulating layer disposed on the second gate electrode, and a pixel electrode disposed on the second interlayer insulating layer and connected to the drain electrode.
Abstract translation: 薄膜晶体管阵列面板包括基板，设置在基板上的第一栅极电极，设置在第一栅电极上的第一自组装单层，设置在第一自组装单层上的栅极绝缘层，设置在第一自组装单层上的半导体 所述栅极绝缘层，与所述半导体重叠的漏电极，所述漏电极相对于所述半导体分离并面对源电极，设置在所述源电极和所述漏电极上的第一层间绝缘层，第二自组装单层 设置在第一层间绝缘层上的第二栅电极，设置在第二自组装单层上的第二栅电极，设置在第二栅电极上的第二层间绝缘层，以及设置在第二层间绝缘层上并连接到漏极的像素电极 。
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公开(公告)号：US10580902B2
公开(公告)日：2020-03-03
申请号：US15691207
申请日：2017-08-30
Applicant: Samsung Display Co., Ltd.
Inventor： Ji Hun Lim , Joon Seok Park , Jay Bum Kim , Jun Hyung Lim , Kyoung Seok Son
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L29/423
Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.
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公开(公告)号：US10217771B2
公开(公告)日：2019-02-26
申请号：US15436066
申请日：2017-02-17
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Ji Hun Lim , Joon Seok Park
IPC: H01L27/12 , H01L29/423 , H01L29/66 , H01L29/786 , H01L29/417
Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor member including a channel region overlapping the gate electrode with the gate insulating layer interposed therebetween, and a source region and a drain region that face each other with the channel region interposed therebetween; an interlayer insulating layer on the semiconductor member; a data conductor on the interlayer insulating layer; and a passivation layer on the data conductor, wherein the interlayer insulating layer has a first hole on the channel region.
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公开(公告)号：US09870735B2
公开(公告)日：2018-01-16
申请号：US14926922
申请日：2015-10-29
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Ji Hun Lim , Yeon Keon Moon , Masataka Kano , Jun Hyung Lim
IPC: G09G3/36 , G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0842 , G09G2320/043
Abstract: A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.
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