Abstract:
A display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines are disposed at a position outside a region of overlap of the conductive member. Accordingly, the capacitances between the signal lines may be substantially the same.
Abstract:
A display device according to an embodiment of the present invention includes: a pixel including a first subpixel and a second subpixel; a first signal line connected to the first subpixel and transmitting a first signal; a second signal line connected to the second subpixel and transmitting a second signal; a third signal line intersecting the first and the second signal lines, connected to at least one of the first and the second subpixels, and transmitting a third signal; and a fourth signal line intersecting the first and the second signal lines and transmitting a fourth signal, wherein the first subpixel and the second subpixel are supplied with data voltages having different magnitude, and the data voltages applied to the first and the second subpixels are originated from a single image information.
Abstract:
A display substrate includes a thin film transistor array disposed in a display area, a signal line disposed in a peripheral area surrounding the display area, a contact electrode disposed on the signal line and contacting the signal line, a light-blocking pattern overlapping a first portion of the contact electrode, and a color pattern overlapping a second portion of the contact electrode.
Abstract:
In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.
Abstract:
A display device includes: a display panel including a display area, and a peripheral area disposed in the vicinity of the display area; a scan driver including a plurality of stages integrated on the peripheral area; a plurality of gate lines connected to the plurality of stages, respectively; and a plurality of pixel rows in the display area and connected with the plurality of gate lines, respectively. The plurality of stages and the plurality of pixel rows are each arranged in a first direction in a line, the peripheral area includes a fan-out region between the plurality of stages and the plurality of pixel rows, and at least one of the plurality of gate lines in the fan-out region is inclined with respect to the first direction, and a second direction perpendicular to the first direction.
Abstract:
A display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines are disposed at a position outside a region of overlap of the conductive member. Accordingly, the capacitances between the signal lines may be substantially the same.
Abstract:
A gate driving circuit includes first to n-th gate clock lines, first to m-th selection lines, a holding control line, a voltage line and a plurality of stages. The first to n-th gate clock lines transfer first to n-th gate clock signals. The first to m-th selection lines transfer first to m-th gate selection signals. The holding control line transfers a holding control signal. The voltage line transfers a gate-off voltage. The stages outputs a plurality of gate signals, each stage outputs a high voltage of a gate clock signal as a gate-on voltage of a gate signal in response to a high voltage of a gate selection signal, and outputs the gate-off voltage in response to a high voltage of the holding control signal.
Abstract:
A display device includes: a display panel including a display area, and a peripheral area disposed in the vicinity of the display area; a scan driver including a plurality of stages integrated on the peripheral area; a plurality of gate lines connected to the plurality of stages, respectively; and a plurality of pixel rows in the display area and connected with the plurality of gate lines, respectively. The plurality of stages and the plurality of pixel rows are each arranged in a first direction in a line, the peripheral area includes a fan-out region between the plurality of stages and the plurality of pixel rows, and at least one of the plurality of gate lines in the fan-out region is inclined with respect to the first direction, and a second direction perpendicular to the first direction.
Abstract:
A display device includes: a display panel including a display area, and a peripheral area disposed in the vicinity of the display area; a scan driver including a plurality of stages integrated on the peripheral area; a plurality of gate lines connected to the plurality of stages, respectively; and a plurality of pixel rows in the display area and connected with the plurality of gate lines, respectively. The plurality of stages and the plurality of pixel rows are each arranged in a first direction in a line, the peripheral area includes a fan-out region between the plurality of stages and the plurality of pixel rows, and at least one of the plurality of gate lines in the fan-out region is inclined with respect to the first direction, and a second direction perpendicular to the first direction.
Abstract:
A display device includes: a display panel including a display area, and a peripheral area disposed in the vicinity of the display area; a scan driver including a plurality of stages integrated on the peripheral area; a plurality of gate lines connected to the plurality of stages, respectively; and a plurality of pixel rows in the display area and connected with the plurality of gate lines, respectively. The plurality of stages and the plurality of pixel rows are each arranged in a first direction in a line, the peripheral area includes a fan-out region between the plurality of stages and the plurality of pixel rows, and at least one of the plurality of gate lines in the fan-out region is inclined with respect to the first direction, and a second direction perpendicular to the first direction.