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    SEMICONDUCTOR MEMORY DEVICE
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20210408008A1

    公开(公告)日：2021-12-30

    申请号：US17471824

    申请日：2021-09-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kiseok LEE ,  Chan-Sic YOON ,  Augustin HONG ,  Keunnam KIM ,  Dongoh KIM ,  Bong-Soo KIM ,  Jemin PARK ,  Hoin LEE ,  Sungho JANG ,  Kiwook JUNG ,  Yoosang HWANG

    IPC: H01L27/108 ,  H01L27/24

    Abstract: A method of manufacturing a semiconductor memory device and a semiconductor memory device, the method including providing a substrate that includes a cell array region and a peripheral circuit region; forming a mask pattern that covers the cell array region and exposes the peripheral circuit region; growing a semiconductor layer on the peripheral circuit region exposed by the mask pattern such that the semiconductor layer has a different lattice constant from the substrate; forming a buffer layer that covers the cell array region and exposes the semiconductor layer; forming a conductive layer that covers the buffer layer and the semiconductor layer; and patterning the conductive layer to form conductive lines on the cell array region and to form a gate electrode on the peripheral circuit region.

    SEMICONDUCTOR MEMORY DEVICES
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES 有权

    公开(公告)号：US20210057416A1

    公开(公告)日：2021-02-25

    申请号：US17090419

    申请日：2020-11-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jiyoung KIM ,  Kiseok LEE ,  Bong-Soo KIM ,  Junsoo KIM ,  Dongsoo WOO ,  Kyupil LEE ,  HyeongSun HONG ,  Yoosang HWANG

    IPC: H01L27/108 ,  H01L27/06 ,  H01L49/02

    Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes a substrate. The semiconductor memory device includes a plurality of memory cell transistors vertically stacked on the substrate. The semiconductor memory device includes a first conductive line connected to a source region of at least one of the plurality of memory cell transistors. The semiconductor memory device includes a second conductive line connected to a plurality of gate electrodes of the plurality of memory cell transistors. Moreover, the semiconductor memory device includes a data storage element connected to a drain region of the at least one of the plurality of memory cell transistors.

    SEMICONDUCTOR MEMORY DEVICES
    5.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES 审中-公开

    公开(公告)号：US20190164985A1

    公开(公告)日：2019-05-30

    申请号：US16027887

    申请日：2018-07-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kiseok LEE ,  Junsoo KIM ,  Hui-Jung KIM ,  Bong-Soo KIM ,  Satoru YAMADA ,  Kyupil LEE ,  Sunghee HAN ,  HyeongSun HONG ,  Yoosang HWANG

    IPC: H01L27/11556 ,  H01L23/532 ,  H01L27/11524 ,  H01L49/02 ,  G11C8/14 ,  G11C7/18

    Abstract: A semiconductor memory device comprises a stack structure including a plurality of layers vertically stacked on a substrate. Each of the plurality of layers includes a first dielectric layer, a semiconductor layer, and a second dielectric layer that are sequentially stacked, and a first conductive line in the second dielectric layer and extending in a first direction. The device also comprises a second conductive line extending vertically through the stack structure, and a capacitor in the stack structure and spaced apart from the second conductive line. The semiconductor layer comprises semiconductor patterns extending in a second direction intersecting the first direction between the first conductive line and the substrate. The second conductive line is between a pair of the semiconductor patterns adjacent to each other in the first direction. An end of each of the semiconductor patterns is electrically connected to a first electrode of the capacitor.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20170005097A1

    公开(公告)日：2017-01-05

    申请号：US15196273

    申请日：2016-06-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Eun-Jung KIM ,  Bong-Soo KIM ,  Yong-Kwan KIM ,  Sung-Hee HAN ,  Yoo-Sang HWANG

    IPC: H01L27/108 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/522

    Abstract: A semiconductor device, including an active region defined in a semiconductor substrate; a first contact plug on the semiconductor substrate, the first contact plug being connected to the active region; a bit line on the semiconductor substrate, the bit line being adjacent to the first contact plug; a first air gap spacer between the first contact plug and the bit line; a landing pad on the first contact plug; a blocking insulating layer on the bit line; and an air gap capping layer on the first air gap spacer, the air gap capping layer vertically overlapping the first air gap spacer, the air gap capping layer being between the blocking insulating layer and the landing pad, an upper surface of the blocking insulating layer being at a height equal to or higher than an upper surface of the landing pad.

    Abstract translation: 一种半导体器件，包括限定在半导体衬底中的有源区; 在所述半导体衬底上的第一接触插塞，所述第一接触插塞连接到所述有源区; 所述半导体衬底上的位线，所述位线与所述第一接触插塞相邻; 在所述第一接触插塞和所述位线之间的第一气隙间隔件; 第一接触塞上的着陆垫; 位线上的阻挡绝缘层; 以及在所述第一气隙间隔件上的气隙盖层，所述气隙盖层与所述第一气隙间隔件垂直重叠，所述气隙盖层位于所述阻挡绝缘层和所述着陆焊盘之间，所述阻挡绝缘层的上表面 处于与着陆垫的上表面相同或更高的高度。

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