公开(公告)号：US20210066455A1

公开(公告)日：2021-03-04

申请号：US16821491

申请日：2020-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghan LEE ,  Changhee KIM ,  Kihwan KIM ,  Suhyueon PARK ,  Jaehong CHOI

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/167 ,  H01L21/8234

Abstract: A semiconductor device including an active region protruding from an upper surface of a substrate and extending in a first horizontal direction, at least two gate electrodes extending in a second horizontal direction and crossing the active region, the second horizontal direction crossing the first horizontal direction, a source/drain region in the active region between the gate electrodes may be provided. The source/drain region includes a recess region, an outer doped layer on an inner wall of the recess region, an intermediate doped layer on the outer doped layer, and an inner doped layer on the intermediate doped layer and filling the recess region. One of the outer doped layer or the intermediate doped layer includes antimony, and the inner doped layer includes phosphorous.

公开(公告)号：US20250107150A1

公开(公告)日：2025-03-27

申请号：US18650292

申请日：2024-04-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daesik KIM ,  Seonbae KIM ,  Taeyong KWON ,  Changhee KIM ,  Doohyun LEE ,  Jaehyun KANG ,  Jinyoung PARK ,  Hyunho PARK ,  Jimin YU ,  Jinwook LEE ,  Seunghyun HWANG

IPC: H01L29/417 ,  H01L21/285 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device includes a substrate including an active region, a gate structure on the substrate, a plurality of channel layers on the active region, spaced apart from each other and surrounded by the gate structure, a source/drain region in a region at which the active region is recessed, on at least one side of the gate structure, and connected to the channel layers, and a contact plug partially recessing the source/drain region from an upper surface of the source/drain region, electrically connected to the source/drain region, and including a metal-semiconductor compound layer along a recessed surface of the source/drain region and a contact conductor layer on the metal-semiconductor compound layer, wherein the metal-semiconductor compound layer has a first thickness on a side surface of the contact conductive layer and a second thickness on a bottom surface of the contact plug, the second thickness being smaller than the first thickness.

公开(公告)号：US20190189778A1

公开(公告)日：2019-06-20

申请号：US16284843

申请日：2019-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungil PARK ,  Changhee KIM ,  Yunil LEE ,  Mirco CANTORO ,  Junggun YOU ,  Donghun LEE

IPC: H01L29/66 ,  H01L29/40 ,  H01L21/28 ,  H01L29/10 ,  H01L29/423 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.

公开(公告)号：US20220399331A1

公开(公告)日：2022-12-15

申请号：US17561867

申请日：2021-12-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changhee KIM ,  Kyungsoo KIM ,  Dongil BAE ,  Sungman WHANG

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor integrated circuit device including a substrate with a first element region of a P type and a second element region of an N type, a channel active region that extends in the first element region or the second element region, the channel active region including a plurality of channels, a plurality of gate lines that extend in a second direction intersecting and include a gate metal layer, and a gate insulating film in contact with the gate metal layer, a plurality of first spacers on opposite side portions of respective ones of the gate lines, and a plurality of source/drain regions that are between ones of the plurality of gate lines. The channel active region includes a first channel directly on the substrate, and a second channel spaced apart from the first channel and extends into the gate metal layer.

公开(公告)号：US20220093739A1

公开(公告)日：2022-03-24

申请号：US17541878

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghan LEE ,  Changhee KIM ,  Kihwan KIM ,  Suhyueon PARK ,  Jaehong CHOI

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/167 ,  H01L21/8234

Abstract: A semiconductor device including an active region protruding from an upper surface of a substrate and extending in a first horizontal direction, at least two gate electrodes extending in a second horizontal direction and crossing the active region, the second horizontal direction crossing the first horizontal direction, a source/drain region in the active region between the gate electrodes may be provided. The source/drain region includes a recess region, an outer doped layer on an inner wall of the recess region, an intermediate doped layer on the outer doped layer, and an inner doped layer on the intermediate doped layer and filling the recess region. One of the outer doped layer or the intermediate doped layer includes antimony, and the inner doped layer includes phosphorous.