公开(公告)号：US11436022B2

公开(公告)日：2022-09-06

申请号：US16599358

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cholmin Kim ,  Jiyong Lee ,  Jongmin Park ,  Deokho Seo ,  Kwanghee Lee

IPC: G06F13/00 ,  G06F9/4401 ,  G06Q20/06 ,  G06F13/16 ,  G06F21/60

Abstract: A semiconductor memory device for a hash solution includes a hashing logic block including a plurality of hashing logics configured to perform a hash function, a memory cell block including a plurality of memory cells, and an input/output (I/O) control structure configured to change a data interface between the hashing logic block and the memory cell block based on a characteristic of the hash function to be performed.

公开(公告)号：US20240177746A1

公开(公告)日：2024-05-30

申请号：US18209057

申请日：2023-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chinam Kim ,  Tae-Kyeong Ko ,  Cholmin Kim

IPC: G11C7/10

CPC classification number: G11C7/1039 ,  G11C7/1069 ,  G11C7/1096

Abstract: A semiconductor memory system includes a memory device including plural banks, and a memory controller that generates an offset address for a first bank among the plural banks and a command indicating the offset address, based on a first request. The memory device generates a first address by adding the offset address to a base address for the first bank, according to the command, and performs a memory operation on the first address of the first bank according to the command.

公开(公告)号：US20200241886A1

公开(公告)日：2020-07-30

申请号：US16599358

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cholmin Kim ,  Jiyong Lee ,  Jongmin Park ,  Deokho Seo ,  Kwanghee Lee

IPC: G06F9/4401 ,  G06F21/60 ,  G06F13/16 ,  G06Q20/06

Abstract: A semiconductor memory device for a hash solution includes a hashing logic block including a plurality of hashing logics configured to perform a hash function, a memory cell block including a plurality of memory cells, and an input/output (I/O) control structure configured to change a data interface between the hashing logic block and the memory cell block based on a characteristic of the hash function to be performed.

公开(公告)号：US09847136B2

公开(公告)日：2017-12-19

申请号：US15290056

申请日：2016-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cholmin Kim ,  Jiyong Lee

IPC: G11C16/32 ,  G06F3/06 ,  G11C16/04 ,  G11C16/26 ,  G11C16/34

CPC classification number: G11C16/32 ,  G06F3/0611 ,  G06F3/0653 ,  G06F3/0656 ,  G06F3/0679 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3431

Abstract: A host device controls a storage device to perform a read operation of a read data unit with respect to selected memory areas. A read latency corresponding to the read operation of the storage device is stored in a read latency table of the host device. A determination is made whether a latency change ratio exceeds a threshold value, based on the read latency stored in the read latency table. The data host requests a data retention operation from the storage device, through a retention command, when the latency change ratio exceeds the threshold value.