公开(公告)号：US09620494B2

公开(公告)日：2017-04-11

申请号：US15260723

申请日：2016-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daewoo Son ,  Chulwoo Kim

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065 ,  H01L21/768 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/50 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/76879 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/09 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H05K3/4614 ,  H05K3/4626 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided are a hybrid substrate, a semiconductor package including the same, and a method for fabricating the semiconductor package. The hybrid substrate may include an insulation layer, and an organic layer. The insulation layer may include a top, a bottom opposite to the top, and a conductive pattern having different pitches. The organic layer may be connected to the bottom of the insulation layer, and may include a circuit pattern connected to the conductive pattern. The conductive pattern may include a first metal pattern, and a second conductive pattern. The first metal pattern may have a first pitch, and may be disposed in the top of the insulation layer. The second conductive pattern may have a second pitch greater than the first pitch, and may be extended from the first metal pattern to be connected to the circuit pattern through the insulation layer.