-
1.发明授权公开(公告)号：US11681616B2
公开(公告)日：2023-06-20
申请号：US17137942
申请日：2020-12-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chi Weon Yoon , Dong Hyuk Chae , Sang-Wan Nam , Jung-Yun Yun
CPC classification number: G06F12/0646 , G06F3/0619 , G06F3/0653 , G06F3/0679 , G11C5/025 , G11C8/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/24 , G06F2212/2022 , G11C2211/5648
Abstract: At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
-
Patent Agency Ranking
2.发明授权Method and apparatus for managing open blocks in nonvolatile memory device 有权用于管理非易失性存储器件中的开放块的方法和装置公开(公告)号：US08995189B2
公开(公告)日：2015-03-31
申请号：US13969929
申请日：2013-08-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sang Yong Yoon , Dong Hyuk Chae , Bo Geun Kim
CPC classification number: G11C16/10 , G11C11/5628 , G11C11/5642 , G11C2211/5648
Abstract: A memory system comprises a multi-bit memory device and a memory controller that controls the multi-bit memory device. The memory system determines whether a requested program operation is a random program operation or a sequential program operation. Where the requested program operation is a random program operation, the memory controller controls the multi-bit memory device to perform operations according to a fine program close policy or a fine program open policy.
Abstract translation: 存储器系统包括多位存储器件和控制多位存储器件的存储器控制器。 存储器系统确定所请求的程序操作是随机程序操作还是顺序程序操作。 在所请求的程序操作是随机程序操作的情况下，存储器控制器控制多位存储器件根据精细程序关闭策略或精细程序打开策略执行操作。
-
3.发明公开公开(公告)号：US20230273880A1
公开(公告)日：2023-08-31
申请号：US18312109
申请日：2023-05-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chi Weon YOON , Dong Hyuk Chae , Sang-Wan Nam , Jung-Yun Yun
CPC classification number: G06F12/0646 , G11C5/025 , G11C16/0483 , G11C11/5642 , G11C11/5628 , G11C8/10 , G06F3/0679 , G06F3/0653 , G06F3/0619 , G11C16/08 , G11C16/24 , G06F2212/2022 , G11C2211/5648
Abstract: At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
-
4.发明授权公开(公告)号：US10671529B2
公开(公告)日：2020-06-02
申请号：US15790583
申请日：2017-10-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chi Weon Yoon , Dong Hyuk Chae , Sang-Wan Nam , Jung-Yun Yun
Abstract: At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
-
公开(公告)号：US12147340B2
公开(公告)日：2024-11-19
申请号：US18312109
申请日：2023-05-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chi Weon Yoon , Dong Hyuk Chae , Sang-Wan Nam , Jung-Yun Yun
Abstract: At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
-
6.发明授权公开(公告)号：US10909032B2
公开(公告)日：2021-02-02
申请号：US16849645
申请日：2020-04-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chi Weon Yoon , Dong Hyuk Chae , Sang-Wan Nam , Jung-Yun Yun
Abstract: At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
-
-
-
-
-
Search Results
6
records
(took 0.013 seconds)
