公开(公告)号：US20230138845A1

公开(公告)日：2023-05-04

申请号：US17810929

申请日：2022-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joo Hwan KIM ,  Su Cheol LEE ,  Jin Do BYUN ,  Eun Seok SHIN ,  Young Don CHOI ,  Jung Hwan CHOI

IPC: G06F3/06 ,  G11C11/4096

Abstract: A memory device, a host device and a method of operating the memory device are provided. The memory device includes a data signal generator configured to provide a data signal to a transmission driver, the transmission driver configured to output a multi-level signal having any one of first to third signal levels based on the data signal, a command decoder configured to receive a feedback signal from outside of the memory device and decode the feedback signal, a data signal controller configured to adjust the data signal based on a decoding result of the command decoder, and a drive strength controller configured to adjust at least one of the first to third signal levels based on the decoding result of the command decoder.

公开(公告)号：US20230143365A1

公开(公告)日：2023-05-11

申请号：US17852664

申请日：2022-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joo Hwan KIM ,  Jun Young PARK ,  Jin Do BYUN ,  Kwang Seob SHIN ,  Eun Seok SHIN ,  Hyun-Yoon CHO ,  Young Don CHOI ,  Jung Hwan CHOI

IPC: G11C7/10

CPC classification number: G11C7/1048 ,  G11C2207/2254

Abstract: A method includes measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit using an initial pull-up code and an initial pull-down code, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code, and determining a calibration setting indicator based on the measurement result, the calibration setting indicator indicating a calibration method of a transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit.

公开(公告)号：US20240212746A1

公开(公告)日：2024-06-27

申请号：US18541218

申请日：2023-12-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minsu JUNG ,  Jindo BYUN ,  Joohwan KIM ,  Eun Seok SHIN ,  Hyun-Yoon CHO ,  Junghwan CHOI

IPC: G11C11/4096 ,  G11C11/4093 ,  H03K19/017

CPC classification number: G11C11/4096 ,  G11C11/4093 ,  H03K19/01742 ,  G11C2207/2254

Abstract: Disclosed is a memory device which includes a pull-up driver that is connected between a power supply voltage and a first node, a T-coil circuit that is connected between the first node and a second node, an external resistor, and a ZQ controller that performs a ZQ calibration operation on the pull-up driver. The ZQ controller includes a path selecting circuit that selects one node among the first node and the second node, a comparing circuit that compares a voltage of the one node selected by the path selecting circuit with a pull-up reference voltage and outputs a comparison result, and a code generating circuit that generates a pull-up code for driving the pull-up driver, based on the comparison result. While the pull-up code is generated, the external resistor is connected between the second node and a ground voltage.

公开(公告)号：US20200350900A1

公开(公告)日：2020-11-05

申请号：US16933057

申请日：2020-07-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun Seok SHIN ,  Jung Ho LEE ,  Michael CHOI

IPC: H03K17/06 ,  H02M3/07 ,  G11C27/02

Abstract: A bootstrap circuit including: a charge pump; a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.

公开(公告)号：US20170093418A1

公开(公告)日：2017-03-30

申请号：US15241262

申请日：2016-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Yeob BAEK ,  Eun Seok SHIN ,  Michael CHOI

IPC: H03M1/12 ,  H03M1/46

CPC classification number: H03M1/124 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/12 ,  H03M1/125 ,  H03M1/466 ,  H03M1/468

Abstract: A successive approximation register (SAR) analog-to-digital converter (ADC) includes a ring oscillator configured to determine a frequency based on a sampling clock signal and a first control code, and generate an output clock signal having the determined frequency. The SAR ADC further includes a controller configured to generate the first control code based on a count value indicating a number of times of toggling the output clock signal.