公开(公告)号：US20220384410A1

公开(公告)日：2022-12-01

申请号：US17883682

申请日：2022-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYUNMOG PARK ,  DAEHYUN KIM ,  JINMIN KIM ,  HEI SEUNG KIM ,  HYUNSIK PARK ,  SANGKIL LEE

IPC: H01L25/18 ,  G11C14/00 ,  G11C16/04 ,  H01L25/00 ,  H01L27/11556 ,  H01L27/11582 ,  H01L23/522 ,  H01L23/48

Abstract: Disclosed are fusion memory devices and methods of fabricating the same. The fusion memory device comprises a first memory device including a first substrate having active and inactive surfaces opposite to each other and a first memory cell circuit on the active surface of the first substrate, a non-memory device including a second substrate having active and inactive surfaces opposite to each other and a non-memory circuit on the active surface of the second substrate, the non-memory device being provided on the first memory device, and a second memory device on the inactive surface of the second substrate and including a second memory cell circuit different from the first memory cell circuit. The non-memory device lies between the first and second memory cell circuits and controls an electrical operation of each of the first and second memory cell circuits.

公开(公告)号：US20240194626A1

公开(公告)日：2024-06-13

申请号：US18584469

申请日：2024-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： SOOJEOUNG PARK ,  HEESEOK LEE ,  HEI SEUNG KIM

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L24/09 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/73 ,  H01L23/3128 ,  H01L23/5389 ,  H01L2224/02313 ,  H01L2224/02333 ,  H01L2224/02381 ,  H01L2224/05569 ,  H01L2224/08112 ,  H01L2224/08225 ,  H01L2224/08265 ,  H01L2224/0903 ,  H01L2224/09103 ,  H01L2224/16112 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/73204 ,  H01L2924/19041 ,  H01L2924/19103

Abstract: A semiconductor package includes a redistribution layer and a semiconductor chip provided on the redistribution layer having a first surface and a second surface opposite to the first surface. The semiconductor chip includes a first chip pad and a second chip pad which are exposed at the first surface. The semiconductor package further includes a capacitor chip disposed between the first surface and the redistribution layer and including a capacitor chip pad connected to the first chip pad, an insulating layer covering the first surface and the capacitor chip, and a conductive post being in contact with the second chip pad and penetrating the insulating layer so as to be connected to the redistribution layer. The conductive post may be spaced apart from the capacitor chip.

公开(公告)号：US20210257324A1

公开(公告)日：2021-08-19

申请号：US17036144

申请日：2020-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： SOOJEOUNG PARK ,  HEESEOK LEE ,  HEI SEUNG KIM

IPC: H01L23/00

Abstract: A semiconductor package includes a redistribution layer and a semiconductor chip provided on the redistribution layer having a first surface and a second surface opposite to the first surface. The semiconductor chip includes a first chip pad and a second chip pad which are exposed at the first surface. The semiconductor package further includes a capacitor chip disposed between the first surface and the redistribution layer and including a capacitor chip pad connected to the first chip pad, an insulating layer covering the first surface and the capacitor chip, and a conductive post being in contact with the second chip pad and penetrating the insulating layer so as to be connected to the redistribution layer. The conductive post may be spaced apart from the capacitor chip.