公开(公告)号：US08759967B2

公开(公告)日：2014-06-24

申请号：US14013238

申请日：2013-08-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hak-Kyoon Byun ,  Dae-Young Choi ,  Mi-Yeon Kim

IPC: H01L23/02 ,  H01L23/48

CPC classification number: H01L23/49827 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17179 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.

Abstract translation: 提供半导体封装和封装封装。 半导体封装包括衬底; 安装在所述基板的表面上的半导体芯片; 设置在基板的表面上的连接导体; 形成在所述基板上并且设置有所述连接导体和所述半导体芯片的模具; 并且连接通过模具延伸的通孔并暴露连接导体。 对于连接通孔的第一连接通孔，由第一连接通孔露出的第一连接导体与第一连接通孔的入口之间的平面距离不均匀。

公开(公告)号：US20140001649A1

公开(公告)日：2014-01-02

申请号：US14013238

申请日：2013-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hak-Kyoon Byun ,  Dae-Young Choi ,  Mi-Yeon Kim

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17179 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.

公开(公告)号：US09111926B2

公开(公告)日：2015-08-18

申请号：US14289635

申请日：2014-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hak-Kyoon Byun ,  Dae-Young Choi ,  Mi-Yeon Kim

IPC: H01L23/02 ,  H01L23/48 ,  H01L23/498 ,  H01L25/10 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/49827 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17179 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.

Abstract translation: 提供半导体封装和封装封装。 半导体封装包括衬底; 安装在所述基板的表面上的半导体芯片; 设置在基板的表面上的连接导体; 形成在所述基板上并且设置有所述连接导体和所述半导体芯片的模具; 并且连接通过模具延伸的通孔并暴露连接导体。 对于连接通孔的第一连接通孔，由第一连接通孔露出的第一连接导体与第一连接通孔的入口之间的平面距离不均匀。