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    HOST FOR CONTROLLING NON-VOLATILE MEMORY CARD, SYSTEM INCLUDING THE SAME, AND METHODS OPERATING THE HOST AND THE SYSTEM
    1.
    发明申请
    HOST FOR CONTROLLING NON-VOLATILE MEMORY CARD, SYSTEM INCLUDING THE SAME, AND METHODS OPERATING THE HOST AND THE SYSTEM 审中-公开

    公开(公告)号：US20190018615A1

    公开(公告)日：2019-01-17

    申请号：US16133111

    申请日：2018-09-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyeong Min Kim ,  Hong Sik Park ,  Hee Dong Shin

    IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02

    Abstract: A host for controlling a non-volatile memory card, a system including the same, and methods of operating the host and the system are provided. The method of operating the host connected with the non-volatile memory card through a clock bus, a command bus, and one or more data buses includes transmitting a first command to the non-volatile memory card through the command bus, transmitting first data corresponding to the first command to the non-volatile memory card through the one or more data buses or receiving the first data from the non-volatile memory card through the data buses, and transmitting a second command to the non-volatile memory card at least once through the command bus during or before transfer of the first data.

    System on chip for reducing wake-up time, method of operating same, and computer system including same
    2.
    发明授权
    System on chip for reducing wake-up time, method of operating same, and computer system including same 有权

    公开(公告)号：US11372472B2

    公开(公告)日：2022-06-28

    申请号：US16838740

    申请日：2020-04-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hee Dong Shin

    IPC: G06F1/32 ,  G06F9/44 ,  G06F1/3287 ,  G06F9/4401 ,  G06F13/24 ,  G11C7/10 ,  G11C11/406

    Abstract: A system on chip (SoC) includes an internal read-only memory (ROM) configured to store a first boot loader; a first internal static random access memory (SRAM) configured to receive a second boot loader output from a booting device, store the second boot loader, and perform a booting sequence according to control of the first boot loader; a second internal SRAM configured to receive a third boot loader output from the booting device, store the third boot loader, and perform a wake-up sequence according to control of the first boot loader; and a dynamic random access memory (DRAM) controller configured to load an operating system (OS) from the booting device into a DRAM according to control of the second boot loader.

    Host, system, and methods for transmitting commands to non-volatile memory card
    3.
    发明授权
    Host, system, and methods for transmitting commands to non-volatile memory card 有权

    公开(公告)号：US10108373B2

    公开(公告)日：2018-10-23

    申请号：US15191749

    申请日：2016-06-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyeong Min Kim ,  Hong Sik Park ,  Hee Dong Shin

    IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

    Abstract: A host for controlling a non-volatile memory card, a system including the same, and methods of operating the host and the system are provided. The method of operating the host connected with the non-volatile memory card through a clock bus, a command bus, and one or more data buses includes transmitting a first command to the non-volatile memory card through the command bus, transmitting first data corresponding to the first command to the non-volatile memory card through the one or more data buses or receiving the first data from the non-volatile memory card through the data buses, and transmitting a second command to the non-volatile memory card at least once through the command bus during or before transfer of the first data.

    Host, system, and methods for transmitting commands to non-volatile memory card
    5.
    发明授权
    Host, system, and methods for transmitting commands to non-volatile memory card 有权
    用于将命令发送到非易失性存储卡的主机，系统和方法

    公开(公告)号：US09389804B2

    公开(公告)日：2016-07-12

    申请号：US14025334

    申请日：2013-09-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyeong Min Kim ,  Hong Sik Park ,  Hee Dong Shin

    IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0656 ,  G06F3/0679 ,  G06F12/0246 ,  G06F13/1684 ,  G06F2221/2105 ,  G06F2221/2153

    Abstract: A host for controlling a non-volatile memory card, a system including the same, and methods of operating the host and the system are provided. The method of operating the host connected with the non-volatile memory card through a clock bus, a command bus, and one or more data buses includes transmitting a first command to the non-volatile memory card through the command bus, transmitting first data corresponding to the first command to the non-volatile memory card through the one or more data buses or receiving the first data from the non-volatile memory card through the data buses, and transmitting a second command to the non-volatile memory card at least once through the command bus during or before transfer of the first data.

    Abstract translation: 提供了用于控制非易失性存储卡的主机，包括其的系统以及操作主机和系统的方法。 通过时钟总线，命令总线和一个或多个数据总线来操作与非易失性存储卡连接的主机的方法包括：通过命令总线向第一命令发送第一命令到非易失性存储卡，发送对应的第一数据 通过所述一个或多个数据总线到所述非易失性存储卡的第一命令，或通过所述数据总线从所述非易失性存储卡接收所述第一数据，以及将至少一次的第二命令发送到所述非易失性存储卡 通过命令总线在传送第一个数据期间或之前。

    Patching boot data utilizing one-time programmable memory and copy patch code instructions
    8.
    发明授权
    Patching boot data utilizing one-time programmable memory and copy patch code instructions 有权

    公开(公告)号：US10459715B2

    公开(公告)日：2019-10-29

    申请号：US15658976

    申请日：2017-07-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sang Uk Park ,  Bong Chun Kang ,  Cheong Woo Lee ,  Hee Dong Shin

    IPC: G06F8/65 ,  G06F3/06 ,  G06F9/4401 ,  G06F8/654

    Abstract: A semiconductor system comprises a nonvolatile memory storing a patch code, the patch code comprising a unique identifier (ID). An internal read only memory (IROM) stores a boot code, the boot code comprising a patch code execution function for executing the patch code and a linked register (LR) address for specifying a storage location where the patch code is to be executed. A static random access memory (SRAM) stores a copy of the patch code at the storage location, the copy of the patch code including the unique ID. A processor executes the copy of the patch code from the storage location. The processor executes the copy of the patch code stored at the storage location in the SRAM according to the comparison result.

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