Variable resistance memory device and related method of operation
    2.
    发明授权
    Variable resistance memory device and related method of operation 有权
    可变电阻存储器件及相关操作方法

    公开(公告)号:US09135996B2

    公开(公告)日:2015-09-15

    申请号:US14047626

    申请日:2013-10-07

    CPC classification number: G11C13/0069 G11C13/0064 G11C2013/0066 G11C2213/72

    Abstract: A variable resistance memory device includes a variable resistance memory cell, a switch that selectively passes a write voltage to an input terminal of the variable resistance memory cell, and a trigger circuit that controls the switch to cut off the write voltage from the input terminal upon determining that the variable resistance memory cell is programmed to a target state by detecting voltage fluctuation of the one side of variable resistance memory cell.

    Abstract translation: 可变电阻存储器件包括可变电阻存储单元,选择性地将写入电压传递到可变电阻存储单元的输入端的开关,以及触发电路,其控制开关从输入端截取写入电压, 通过检测可变电阻存储单元的一侧的电压波动来确定可变电阻存储单元被编程为目标状态。

    Apparatuses and methods providing redundant array of independent disks access to non-volatile memory chips
    3.
    发明授权
    Apparatuses and methods providing redundant array of independent disks access to non-volatile memory chips 有权
    提供独立磁盘的冗余阵列访问非易失性存储器芯片的装置和方法

    公开(公告)号:US08631202B2

    公开(公告)日:2014-01-14

    申请号:US13626077

    申请日:2012-09-25

    Inventor: Ho Jung Kim

    CPC classification number: G06F3/0658 G06F3/0619 G06F3/0688 G06F11/108

    Abstract: A controller may include a RAID controller and an access controller. The RAID controller exchanges data with a host and select ones of a plurality of RAID levels responsive to RAID level information. The access controller is connected to the RAID controller and to a plurality of channels that are each connected to a plurality of non-volatile memory chips. The access controller accesses data in at least one of the non-volatile memory chips connected to each of the channels according to the selected RAID level. The controller can include a storage device and a main processor. The main processor logically partitions a plurality of non-volatile memory chips connected to each of a plurality of channels into a normal partition region and a RAID level partition region, where data access is performed according to a selected RAID level, in response partition information that is stored in the storage device.

    Abstract translation: 控制器可以包括RAID控制器和访问控制器。 RAID控制器与主机交换数据,并根据RAID级别信息选择多个RAID级别中的一个。 访问控制器连接到RAID控制器和连接到多个非易失性存储器芯片的多个通道。 访问控制器根据所选择的RAID级别访问连接到每个信道的至少一个非易失性存储器芯片中的数据。 控制器可以包括存储设备和主处理器。 主处理器将连接到多个信道中的每一个的多个非易失性存储器芯片逻辑地划分为正常分区区域和RAID级别分区区域,其中根据所选择的RAID级别执行数据访问,响应分区信息, 存储在存储设备中。

    APPARATUSES AND METHODS PROVIDING REDUNDANT ARRAY OF INDEPENDENT DISKS ACCESS TO NON-VOLATILE MEMORY CHIPS
    5.
    发明申请
    APPARATUSES AND METHODS PROVIDING REDUNDANT ARRAY OF INDEPENDENT DISKS ACCESS TO NON-VOLATILE MEMORY CHIPS 有权
    提供独立磁盘冗余阵列访问非易失性存储卡的设备和方法

    公开(公告)号:US20130042061A1

    公开(公告)日:2013-02-14

    申请号:US13626077

    申请日:2012-09-25

    Inventor: Ho Jung Kim

    CPC classification number: G06F3/0658 G06F3/0619 G06F3/0688 G06F11/108

    Abstract: A controller may include a RAID controller and an access controller. The RAID controller exchanges data with a host and select ones of a plurality of RAID levels responsive to RAID level information. The access controller is connected to the RAID controller and to a plurality of channels that are each connected to a plurality of non-volatile memory chips. The access controller accesses data in at least one of the non-volatile memory chips connected to each of the channels according to the selected RAID level. The controller can include a storage device and a main processor. The main processor logically partitions a plurality of non-volatile memory chips connected to each of a plurality of channels into a normal partition region and a RAID level partition region, where data access is performed according to a selected RAID level, in response partition information that is stored in the storage device.

    Abstract translation: 控制器可以包括RAID控制器和访问控制器。 RAID控制器与主机交换数据,并根据RAID级别信息选择多个RAID级别中的一个。 访问控制器连接到RAID控制器和连接到多个非易失性存储器芯片的多个通道。 访问控制器根据所选择的RAID级别访问连接到每个信道的至少一个非易失性存储器芯片中的数据。 控制器可以包括存储设备和主处理器。 主处理器将连接到多个信道中的每一个的多个非易失性存储器芯片逻辑地划分为正常分区区域和RAID级别分区区域,其中根据所选择的RAID级别执行数据访问,响应分区信息, 存储在存储设备中。

Patent Agency Ranking