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    STORAGE DEVICE PERFORMING PEER-TO-PEER COMMUNICATION WITH EXTERNAL DEVICE WITHOUT INTERVENTION OF HOST
    1.
    发明申请
    STORAGE DEVICE PERFORMING PEER-TO-PEER COMMUNICATION WITH EXTERNAL DEVICE WITHOUT INTERVENTION OF HOST 有权

    公开(公告)号：US20210294769A1

    公开(公告)日：2021-09-23

    申请号：US17343215

    申请日：2021-06-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hojun Shim

    IPC: G06F13/40 ,  G06F3/06

    Abstract: A storage device is provided. The storage device includes a field programmable gate array board connected to a first port of the storage device; and a storage controller including a first interface circuit and a second interface circuit. The first interface circuit is connected to the FPGA board, the second interface circuit is connected to a second port of the storage device, at least one port from among the first port and the second port being configured to connect to an external storage device, and the FPGA board is configured to provide a path for transferring data in a peer-to-peer manner between the storage controller and the external storage device without intervention of a host.

    Storage device and data transferring method thereof
    2.
    发明授权
    Storage device and data transferring method thereof 有权
    存储设备及其数据传输方法

    公开(公告)号：US09304938B2

    公开(公告)日：2016-04-05

    申请号：US14088837

    申请日：2013-11-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hojun Shim ,  Eunchan Kim

    IPC: G06F12/02 ,  G06F12/10 ,  G06F13/28

    CPC classification number: G06F12/1081 ,  G06F12/0238 ,  G06F13/28 ,  G06F2212/1024 ,  G06F2212/214 ,  G06F2212/7203

    Abstract: A data transferring method of a storage device is provided. The method may include transferring a first data to a first outbound area, transferring the first data sent to the first outbound area to a first area of a main memory corresponding to a first address programmed by an address translation unit, transferring a second data to a second outbound area in response to an indication that the address translation unit is to be reprogrammed, and transferring the second data sent to the second outbound area to the first outbound area.

    Abstract translation: 提供了一种存储装置的数据传送方法。 该方法可以包括将第一数据传送到第一出站区域，将发送到第一出站区域的第一数据传送到与由地址转换单元编程的第一地址相对应的主存储器的第一区域，将第二数据传送到 响应于要对地址转换单元重新编程的指示的第二出站区域，以及将发送到第二出站区域的第二数据传送到第一出站区域。

    Systems and methods for DMA controller for checking the status of metadata prior to or simultaneously when transferring data to host
    6.
    发明授权
    Systems and methods for DMA controller for checking the status of metadata prior to or simultaneously when transferring data to host 有权
    用于在将数据传输到主机之前或同时检查元数据状态的DMA控制器的系统和方法

    公开(公告)号：US09164677B2

    公开(公告)日：2015-10-20

    申请号：US14095177

    申请日：2013-12-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hojun Shim

    IPC: G06F3/00 ,  G06F13/00 ,  G06F3/06 ,  G06F13/16

    CPC classification number: G06F3/061 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/1668

    Abstract: A memory controller is provided which includes a host interface configured to provide an interface for communication with a host; a buffer memory configured to store user data and metadata of the user data; and a DMA controller configured to access the buffer memory to check the metadata and to provide user data corresponding to a logical block address requested from a host to the host interface according to the checking result. The metadata includes status information of the user data stored at the buffer memory. Before providing the host interface with user data corresponding to a first logical block address requested from the host, the DMA controller checks metadata of user data corresponding to a second logical block address requested from the host.

    Abstract translation: 提供了一种存储器控制器，其包括被配置为提供用于与主机通信的接口的主机接口; 缓冲存储器，被配置为存储用户数据和用户数据的元数据; 以及DMA控制器，被配置为访问缓冲存储器以检查元数据，并根据检查结果向与主机接口请求的逻辑块地址相对应的用户数据提供。 元数据包括存储在缓冲存储器中的用户数据的状态信息。 在向主机接口提供对应于从主机请求的第一逻辑块地址的用户数据之前，DMA控制器检查对应于从主机请求的第二逻辑块地址的用户数据的元数据。

    Storage controller managing completion timing, and operating method thereof
    7.
    发明授权
    Storage controller managing completion timing, and operating method thereof 有权

    公开(公告)号：US11366770B2

    公开(公告)日：2022-06-21

    申请号：US16983471

    申请日：2020-08-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangmuk Hwang ,  Jaegeun Park ,  Hojun Shim ,  Byungchul Yoo

    IPC: G06F13/16 ,  G06F13/28

    Abstract: A method of operating a storage controller that communicates with a host including a submission queue and a completion queue is provided. The operating method includes receiving a submission queue doorbell from the host, fetching a first command including a latency from the submission queue of the host in response to the received submission queue doorbell, processing the fetched first command, and writing a first completion, which indicates that the first command is completely processed, into the completion queue of the host at a timing based on the latency.

    Storage device and method of controlling link state thereof
    8.
    发明授权
    Storage device and method of controlling link state thereof 审中-公开

    公开(公告)号：US10671141B2

    公开(公告)日：2020-06-02

    申请号：US15711397

    申请日：2017-09-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ohsung Kwon ,  Youngjun Yoo ,  Hojun Shim ,  Kwanggu Lee

    IPC: G06F1/3215 ,  G06F1/3234 ,  G06F1/3228 ,  G06F1/3287 ,  G06F3/06

    Abstract: A method of controlling a link state of a communication port of a storage device according to the present inventive concepts includes setting the link state of the communication port to a link active state that can exchange data with a host, determining a holding time of a first standby state among link states of the communication port, changing the link state of the communication port to the first standby state, monitoring whether an exit event occurs during the holding time from the time when a transition to the first standby state occurs, and in response to an exit event not occurring during the holding time, changing the link state of the communication port to a second standby state. A recovery time from the first standby state to the link active state is shorter than a recovery time from the second standby state to the link active state.

    Storage controller managing completion timing, and operating method thereof
    9.
    发明授权
    Storage controller managing completion timing, and operating method thereof 有权

    公开(公告)号：US12013796B2

    公开(公告)日：2024-06-18

    申请号：US17751798

    申请日：2022-05-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangmuk Hwang ,  Jaegeun Park ,  Hojun Shim ,  Byungchul Yoo

    IPC: G06F13/16 ,  G06F13/28

    CPC classification number: G06F13/1642 ,  G06F13/161 ,  G06F13/1689 ,  G06F13/28

    Abstract: A storage controller includes a command manager and a direct memory access (DMA) engine. The command manager receives a first submission queue doorbell from an external device, fetches a first command including a first latency from the external device in response to the first submission queue doorbell, and determines a first timing to write a first completion into the external device based on the first latency, the first completion indicating that the first command is completely processed. The DMA engine receives a request signal requesting processing of the first command from the command manager, transfer data, which the first command requests, based on a DMA transfer in response to the request signal, and outputs a complete signal, which indicates that the first command is completely processed, to the command manager.

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